All 5 retro CPUs (Intel 4004/4040/8080/8086 + Zilog Z80) plus all 3 bus devices (rom-32k, ram-64k, latch-8282) are now implemented. Update top-level matrix and per-chip READMEs to reflect 63/80 tests passing, 0 failed, 17 deferred. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com> |
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| .. | ||
| autosearch | ||
| scripts | ||
| src | ||
| test_4004 | ||
| test_4040 | ||
| test_8080 | ||
| test_8086 | ||
| test_buses | ||
| test_z80 | ||
| .gitignore | ||
| 00_README.md | ||
| package-lock.json | ||
| package.json | ||
| vitest.config.js | ||