velxio/scripts
David Montero Crespo 96ef12b585 feat(chips): programmable Z80 chip + Larson scanner example
Adds the Zilog Z80 to the programmable-retro-CPU lineup. Same compile-rom
flow that landed for the 8080 in PR #189: write Z80 asm in a project
file, click Compile (backend assembles via in-tree two-pass asm-z80),
click Run, the chip emulator boots from the resulting ROM bytes.

Backend:
- backend/app/services/asmz80.py — two-pass Z80 assembler covering the
  practical demo subset: LD r,n / r,r' / rp,nn / (nn),A / A,(nn) +
  ALU r/n + INC/DEC + JP/JR/DJNZ/CALL/RET + PUSH/POP + IN/OUT +
  EX/EXX + LDIR/LDDR/IM/NEG + RLCA/RRCA/RLA/RRA + the simple
  ED-prefix variants. Not yet: CB-prefix bit ops, DD/FD index ops.
- rom_compile.py routes target=z80 through the new assembler.

Chip:
- frontend/src/components/customChips/examples/intel/z80-cpu.{c,chip.json}
  Generated by scripts/make-z80-cpu.py from the existing z80.c emulator
  (same clean-room implementation that passes ZEXDOC end-to-end). The
  external pin/bus protocol is replaced with internal RAM + ROM + MMIO
  for LED/BTN/UART. 35 KB WASM.

Example:
- /examples/z80-larson-scanner — Knight-Rider-style walking LED.
  Demonstrates JR/DJNZ/RLCA which the 8080 can't run.

Plus a small Z80 smoke-test asm under scripts/.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-05-19 00:21:08 -03:00
..
asm8080.py feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
component-overrides.json fix(components-metadata): sync power-supply override + regenerate 2026-05-18 19:32:34 +02:00
counter-rom.s feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
counter-rom.txt feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
generate-component-metadata.ts
generate-component-svgs.cjs
generate-example-screenshots.md
generate-favicons.mjs
generate-og-image.mjs
generate-sitemap.ts
killbits-rom.s feat(chips): programmable retro CPU chips with external ROM 2026-05-18 23:38:18 -03:00
larson-z80.s feat(chips): programmable Z80 chip + Larson scanner example 2026-05-19 00:21:08 -03:00
make-z80-cpu.py feat(chips): programmable Z80 chip + Larson scanner example 2026-05-19 00:21:08 -03:00
repl-rom.s feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
repl-rom.txt feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
test-z80.s feat(chips): programmable Z80 chip + Larson scanner example 2026-05-19 00:21:08 -03:00
visual-led-test.mjs test(visual-led): add RGB + 7-segment leafCheck assertions 2026-05-18 22:39:01 -03:00