83 lines
3.5 KiB
Python
83 lines
3.5 KiB
Python
"""ESP32 GPIO Matrix output signal source IDs.
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Lifted from the ESP32 Technical Reference Manual (Espressif ESP32 TRM
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section 4.11, "IO_MUX and GPIO Matrix"). Each output GPIO has a
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configuration register `GPIO_FUNCx_OUT_SEL_CFG_REG[x]` whose low 9
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bits (`FUNCx_OUT_SEL`) select one of 256 internal peripheral signals
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to drive the pin. The constants below name the signals that velxio
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actually emulates today; add more here when a new peripheral wants
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to participate in the SignalRouter.
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The signal ID range mirrors the QEMU plugin's interpretation of
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`gpio_out_sel`; the existing worker code at
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`esp32_worker.py:_refresh_ledc_gpio_map` already reads these values
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out of the matrix via `qemu_picsimlab_get_internals(2)`.
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"""
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from __future__ import annotations
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# ── LEDC (PWM peripheral) ─────────────────────────────────────────────────
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# Per ESP32 Technical Reference Manual section 4.11, Table 4-3 (GPIO
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# Matrix output signals):
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# 71-78 → LEDC_HS_SIG_OUT[0..7] (high-speed channels 0-7)
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# 79-86 → LEDC_LS_SIG_OUT[0..7] (low-speed channels 0-7)
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#
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# The legacy worker code at esp32_worker.py:426 used the off-by-one
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# range 72-87; that masked itself because the channel index encoded in
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# the 0x5000 duty callback (0..15) was internally consistent with the
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# bogus signal-id math, so single-servo demos still appeared to work.
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# Multi-servo projects (e.g. solar-tracker, project 5218f9e3) exposed
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# the bug — `ledcAttachPin(13, 0)` actually writes signal 71 to
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# gpio_out_sel[13], which the off-by-one scan REJECTED, so channel 0
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# resolved to GPIO 12 (the next servo's pin, whose signal 72 WAS in
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# range and was misinterpreted as channel 0).
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SIG_LEDC_HS_CH0_OUT_IDX = 71 # add N for HS channel N (0..7)
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SIG_LEDC_HS_CH_LAST = 78
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SIG_LEDC_LS_CH0_OUT_IDX = 79 # add N for LS channel N (0..7)
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SIG_LEDC_LS_CH_LAST = 86
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def ledc_signal_for_channel(channel: int) -> int:
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"""Map a velxio-style unified LEDC channel index (0..15) to its
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GPIO Matrix signal source id.
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The ESP32 LEDC hardware has two channel groups: 8 high-speed (HS)
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and 8 low-speed (LS). velxio unifies them into a single 0..15
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space where ch 0-7 = HS, ch 8-15 = LS (matches the encoding the
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QEMU plugin emits on the 0x5000 duty callback).
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"""
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if not 0 <= channel < 16:
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raise ValueError(f"ledc channel out of range: {channel}")
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if channel < 8:
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return SIG_LEDC_HS_CH0_OUT_IDX + channel
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return SIG_LEDC_LS_CH0_OUT_IDX + (channel - 8)
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def channel_for_ledc_signal(signal_id: int) -> int | None:
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"""Inverse of :func:`ledc_signal_for_channel`. Returns None when
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the signal id is not an LEDC channel."""
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if SIG_LEDC_HS_CH0_OUT_IDX <= signal_id <= SIG_LEDC_HS_CH_LAST:
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return signal_id - SIG_LEDC_HS_CH0_OUT_IDX
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if SIG_LEDC_LS_CH0_OUT_IDX <= signal_id <= SIG_LEDC_LS_CH_LAST:
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return 8 + (signal_id - SIG_LEDC_LS_CH0_OUT_IDX)
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return None
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# ── Sentinel for "GPIO not routed to any peripheral" ──────────────────────
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# When `gpio_out_sel[N]` carries this value the pin is driven by
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# normal GPIO output (the value in the GPIO_OUT_REG bit N), not a
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# peripheral signal.
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SIG_GPIO_DIRECT_OUT_IDX = 256
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__all__ = [
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"SIG_LEDC_HS_CH0_OUT_IDX",
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"SIG_LEDC_HS_CH_LAST",
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"SIG_LEDC_LS_CH0_OUT_IDX",
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"SIG_LEDC_LS_CH_LAST",
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"SIG_GPIO_DIRECT_OUT_IDX",
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"ledc_signal_for_channel",
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"channel_for_ledc_signal",
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]
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