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David Montero 391817d2c9 fix(components-metadata): sync power-supply override + regenerate 
Two pieces of drift introduced in 305170a (Regulated Power Supply):

1. The committed components-metadata.json carries a custom rich
   thumbnail SVG (showing 5.00V / 1.00A / PSU labels), but the
   _customComponents override has no `thumbnail` field — so any
   regen via `npm run generate:metadata` replaces it with the
   generic placeholder. CI catches the drift and fails.
   Fix: lift the rich SVG into the override entry.

2. The committed metadata description is a short one-liner while
   the override description is the longer explanatory version.
   The override is the source of truth, so the metadata now
   matches: longer description wins.

Verified locally: regenerator now produces zero diff against the
committed metadata.
 		2026-05-18 19:32:34 +02:00
..
asm8080.py feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
component-overrides.json fix(components-metadata): sync power-supply override + regenerate 2026-05-18 19:32:34 +02:00
counter-rom.s feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
counter-rom.txt feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
generate-component-metadata.ts fix(install): unblock self-hosting + drop forced wokwi clones 2026-05-04 00:04:11 -03:00
generate-component-svgs.cjs fix(scripts): generate-component-svgs no longer skips bmp280 / fails on ssd1306 2026-05-09 00:05:28 -03:00
generate-example-screenshots.md
…
generate-favicons.mjs
…
generate-og-image.mjs
…
generate-sitemap.ts
…
repl-rom.s feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00
repl-rom.txt feat(chips): port retro Intel/Zilog CPUs as Velxio custom chips + 2 demos 2026-05-18 02:27:53 -03:00