101 lines
2.5 KiB
ArmAsm
101 lines
2.5 KiB
ArmAsm
; i8080 banner ROM — bundled chip's program.
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;
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; Memory map:
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; 0x0000 ROM (this code)
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; 0x1000 RAM (256 bytes, stack only)
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; 0x2000 UART_DATA (write TX byte)
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; 0x2001 UART_STAT (bit 0 = TX always ready)
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;
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; What it does:
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; prints a banner from ROM, sleeps ~50 ms, and prints a counter line
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; ("uptime ticks: NN") forever. Demonstrates the 8080 executing real
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; code (JMP, LXI, CALL, RET, DCR, conditional branch, memory access)
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; without needing UART RX — so it works cleanly even when the host AVR
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; echoes Serial traffic back into the chip's RX.
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ORG 0x0000
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LXI SP, 0x10FF ; stack at top of RAM
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LXI H, banner
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CALL puts
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MVI A, 0
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STA 0x1000 ; tick counter at 0x1000
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loop:
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LXI H, label_ticks
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CALL puts
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LDA 0x1000
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CALL prhex
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MVI A, 0x0D
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CALL putc
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MVI A, 0x0A
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CALL putc
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LDA 0x1000
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INR A
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STA 0x1000
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CALL delay
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JMP loop
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; ─── delay: ~50 ms of busy-wait. At ~1 MIPS that's 50_000 instructions. ──
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delay:
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LXI H, 0x0200 ; 512 outer iters * inner 100 = ~50K instr
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delay_outer:
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MVI B, 100
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delay_inner:
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DCR B
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JNZ delay_inner
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DCX H
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MOV A, H
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ORA L
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JNZ delay_outer
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RET
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; ─── primitives ─────────────────────────────────────────────────────────
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putc:
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STA 0x2000
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RET
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puts:
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MOV A, M
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CPI 0
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RZ
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CALL putc
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INX H
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JMP puts
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prhex:
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MOV C, A
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RRC
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RRC
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RRC
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RRC
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ANI 0x0F
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CALL prnib
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MOV A, C
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ANI 0x0F
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CALL prnib
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RET
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prnib:
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CPI 10
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JC prnib_dig
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ADI 'A'-10
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CALL putc
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RET
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prnib_dig:
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ADI '0'
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CALL putc
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RET
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; ─── strings ───────────────────────────────────────────────────────────
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banner:
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DB "\r\n"
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DB " ===========================================\r\n"
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DB " velxio i8080 - clean-room Intel 8080A in WASM\r\n"
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DB " Booted from a 200-byte embedded ROM image\r\n"
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DB " ===========================================\r\n"
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DB "\r\n", 0
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label_ticks:
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DB " uptime ticks: 0x", 0
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