feat(sim): Phase 3 — logic families (TTL/CMOS-5V/LVCMOS33/AVR_HC/Schmitt)
Replaces the Phase 1b vcc/2-flat threshold with per-logic-family
Vil/Vih thresholds + Schmitt-trigger hysteresis where applicable.
SPICE-resolved digital reads now match what real ICs actually do —
TTL noise margins, CMOS rail-to-rail, 74HC14 Schmitt hysteresis,
LVCMOS33 vs CMOS-5V interop.
New module: simulation/LogicFamilies.ts
- LogicFamily interface (vcc, vil, vih, vil_schmitt?, vih_schmitt?,
cin_pF, vol_max?, voh_min?, output_impedance_ohm?)
- FAMILIES catalog: TTL, CMOS-5V, CMOS-5V-SCHMITT, CMOS-5V-TTL-INPUTS,
LVCMOS33, AVR_HC, CMOS-3.3V — all sourced from TI / ATmega328P /
JEDEC datasheets.
- BOARD_FAMILY: per-board lookup. Uno/Mega/Nano/ATtiny → AVR_HC,
ESP32 family + Pi Pico → LVCMOS33, fall back to AVR_HC for
unknown boards.
- getBoardLogicFamily() and getLogicFamilyById() helpers.
PinResolver:
- SpiceResolvedConfig docstring rewritten with Phase 3 wording.
- New `configFromLogicFamily()` builder — picks Schmitt thresholds
when the family declares them, falls back to vih/vil otherwise.
DynamicComponent:
- When the trace crosses an active device, the SPICE-resolved
resolver is now built with the OWNER BOARD's logic family
instead of vcc/2. Hysteresis comes through automatically for
boards whose native family is Schmitt-capable.
- Phase 3 continued: per-component logicFamily override from
components-metadata.json (so e.g. a 74HC14 placed on an Arduino
Uno gets Schmitt thresholds even though the BOARD is AVR_HC).
Tests:
- logic-families.test.ts (new) — 19/19 passing.
Covers catalog sanity (vil < vih, vol_max ≤ vil, voh_min ≥ vih),
per-board lookup, Schmitt vs non-Schmitt config, noise rejection
behavior of 74HC14 Schmitt resolver, last-state-wins behavior
of CMOS-5V dead band.
- Phase 0 + Phase 1b regression: 16/16 still passing.
- tsc --noEmit on new files: clean.
No deploy in this commit — staged for end-of-session rebuild.
This commit is contained in:
davidmonterocrespo24
parent
27c59664cd
commit
cb07a88095
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@ -0,0 +1,196 @@
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/**
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* Phase 3 tests — logic family catalog and threshold conversion via
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* `configFromLogicFamily` + `createSpiceResolvedPinResolver`.
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*
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* Verifies:
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* - Every family has self-consistent parameters (vil < vih, etc.)
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* - Per-board family lookup (Arduino Uno → AVR_HC, ESP32 → LVCMOS33)
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* - Schmitt-trigger hysteresis routes through to the resolver config
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* - Real-world noise-margin scenarios (TTL input with ringing)
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*/
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import { describe, it, expect, vi } from 'vitest';
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import {
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FAMILIES,
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getBoardLogicFamily,
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getLogicFamilyById,
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type LogicFamily,
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} from '../simulation/LogicFamilies';
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import {
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configFromLogicFamily,
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createSpiceResolvedPinResolver,
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type SpiceVoltageSource,
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} from '../simulation/PinResolver';
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function mockSource(): {
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source: SpiceVoltageSource;
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fire: (v: number) => void;
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} {
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let voltage: number | null = null;
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const subs: Array<(state: string, v: number) => void> = [];
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return {
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source: {
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subscribe(_id, _pin, cb) {
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subs.push(cb as (s: string, v: number) => void);
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return () => {
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const i = subs.indexOf(cb as (s: string, v: number) => void);
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if (i >= 0) subs.splice(i, 1);
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};
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},
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getCurrentVoltage() {
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return voltage;
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},
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},
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fire(v: number) {
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voltage = v;
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for (const cb of subs) cb('UNKNOWN' as unknown as string, v);
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},
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};
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}
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describe('LogicFamilies — catalog sanity', () => {
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it.each(Object.entries(FAMILIES))('%s has self-consistent params', (name, family: LogicFamily) => {
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expect(family.name).toBeTruthy();
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expect(family.vcc).toBeGreaterThan(0);
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expect(family.vil).toBeLessThan(family.vih); // dead band must have width
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expect(family.cin_pF).toBeGreaterThan(0);
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if (family.vol_max !== undefined && family.voh_min !== undefined) {
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// Output range must cover input range — otherwise the family
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// can't drive itself.
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expect(family.vol_max).toBeLessThanOrEqual(family.vil);
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expect(family.voh_min).toBeGreaterThanOrEqual(family.vih);
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}
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if (family.vil_schmitt !== undefined && family.vih_schmitt !== undefined) {
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expect(family.vil_schmitt).toBeLessThan(family.vih_schmitt);
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}
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// Suppress unused-name lint: `name` is just for test labelling.
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void name;
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});
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it('TTL/LVCMOS33 share input thresholds (interoperate by design)', () => {
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expect(FAMILIES.TTL.vil).toBe(FAMILIES.LVCMOS33.vil);
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expect(FAMILIES.TTL.vih).toBe(FAMILIES.LVCMOS33.vih);
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});
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it('CMOS-5V-SCHMITT has wider hysteresis than CMOS-5V', () => {
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const schmitt = FAMILIES['CMOS-5V-SCHMITT'];
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expect(schmitt.vil_schmitt).toBeDefined();
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expect(schmitt.vih_schmitt).toBeDefined();
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const hyst = (schmitt.vih_schmitt ?? 0) - (schmitt.vil_schmitt ?? 0);
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expect(hyst).toBeGreaterThan(1.0); // ~1.4V per datasheet
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});
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});
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describe('getBoardLogicFamily', () => {
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it('Arduino Uno → AVR_HC (5V)', () => {
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const f = getBoardLogicFamily('arduino-uno');
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expect(f.name).toBe('AVR (ATmega) 5V');
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expect(f.vcc).toBe(5);
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});
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it('ESP32 → LVCMOS33 (3.3V)', () => {
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const f = getBoardLogicFamily('esp32');
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expect(f.vcc).toBe(3.3);
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expect(f.vih).toBe(2.0); // TTL-compatible inputs at 3.3V
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});
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it('Raspberry Pi Pico → LVCMOS33', () => {
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const f = getBoardLogicFamily('raspberry-pi-pico');
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expect(f.vcc).toBe(3.3);
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});
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it('unknown board falls back to AVR_HC (conservative default)', () => {
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const f = getBoardLogicFamily('made-up-board-9000');
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expect(f.vcc).toBe(5);
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});
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});
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describe('getLogicFamilyById', () => {
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it('returns null for nullish/unknown ids', () => {
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expect(getLogicFamilyById(null)).toBeNull();
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expect(getLogicFamilyById(undefined)).toBeNull();
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expect(getLogicFamilyById('')).toBeNull();
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expect(getLogicFamilyById('not-a-family')).toBeNull();
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});
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it('resolves valid family ids', () => {
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expect(getLogicFamilyById('TTL')?.name).toBe('TTL');
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expect(getLogicFamilyById('CMOS-5V-SCHMITT')?.vih_schmitt).toBeDefined();
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});
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});
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describe('configFromLogicFamily', () => {
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it('uses vih/vil for non-Schmitt families', () => {
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const cfg = configFromLogicFamily(FAMILIES['CMOS-5V']);
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expect(cfg.thresholdHigh).toBe(FAMILIES['CMOS-5V'].vih);
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expect(cfg.thresholdLow).toBe(FAMILIES['CMOS-5V'].vil);
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expect(cfg.vcc).toBe(5);
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});
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it('uses vih_schmitt/vil_schmitt for Schmitt families (hysteresis)', () => {
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const cfg = configFromLogicFamily(FAMILIES['CMOS-5V-SCHMITT']);
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expect(cfg.thresholdHigh).toBe(FAMILIES['CMOS-5V-SCHMITT'].vih_schmitt);
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expect(cfg.thresholdLow).toBe(FAMILIES['CMOS-5V-SCHMITT'].vil_schmitt);
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// Important: thresholdLow < thresholdHigh → real hysteresis exists
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expect(cfg.thresholdLow).toBeLessThan(cfg.thresholdHigh);
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});
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});
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describe('SpiceResolvedPinResolver + Schmitt family — noise rejection', () => {
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it('does not glitch on noise within the dead band', () => {
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const { source, fire } = mockSource();
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const r = createSpiceResolvedPinResolver(
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'ic-74hc14-1',
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'A',
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source,
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configFromLogicFamily(FAMILIES['CMOS-5V-SCHMITT']),
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);
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const cb = vi.fn();
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r.onChange(cb);
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// First fire: FLOATING → LOW (real transition, cb fires once).
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fire(0.5);
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expect(cb).toHaveBeenCalledWith('LOW', 0.5);
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cb.mockClear();
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// Cross Vt+ (3.0V for 74HC14) → HIGH
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fire(3.5);
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expect(cb).toHaveBeenCalledWith('HIGH', 3.5);
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cb.mockClear();
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// Bounce inside the dead band (Vt- = 1.6V, Vt+ = 3.0V) — must NOT glitch
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fire(2.5);
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fire(2.0);
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fire(2.7);
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expect(cb).not.toHaveBeenCalled();
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// Drop below Vt- → LOW
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fire(1.2);
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expect(cb).toHaveBeenCalledWith('LOW', 1.2);
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});
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it('non-Schmitt family does NOT hold state in the dead band', () => {
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const { source, fire } = mockSource();
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// CMOS-5V has vih=3.5 and vil=1.5. configFromLogicFamily uses vih/vil
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// directly (no hysteresis variant), so thresholdHigh === 3.5 and
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// thresholdLow === 1.5. Voltages in 1.5..3.5 stay in last state.
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const r = createSpiceResolvedPinResolver(
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'ic-74hc04-1',
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'A',
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source,
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configFromLogicFamily(FAMILIES['CMOS-5V']),
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);
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const cb = vi.fn();
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r.onChange(cb);
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fire(0.5); // LOW
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fire(4.5); // → HIGH
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expect(cb).toHaveBeenLastCalledWith('HIGH', 4.5);
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cb.mockClear();
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// Drop to 2.5V — in dead band, stays HIGH (this is the
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// last-state-wins behavior even without explicit hysteresis)
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fire(2.5);
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expect(cb).not.toHaveBeenCalled();
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});
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});
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@ -20,11 +20,13 @@ import { isBoardComponent, boardPinToNumber } from '../utils/boardPinMapping';
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import {
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createDefaultPinResolver,
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createSpiceResolvedPinResolver,
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configFromLogicFamily,
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isActiveDevice,
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type PinResolver,
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} from '../simulation/PinResolver';
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import { BOARD_PIN_GROUPS } from '../simulation/spice/boardPinGroups';
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import { getMixedModeScheduler } from '../simulation/spice/MixedModeScheduler';
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import { getBoardLogicFamily } from '../simulation/LogicFamilies';
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// Side-effect imports: register every web component we'll create at runtime.
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// `@wokwi/elements` covers the upstream catalog; `../velxio-elements` adds
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const detailed = traceDetailed(id, componentPinName, 0);
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if (detailed.crossedActiveDevice) {
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const scheduler = getMixedModeScheduler();
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// Threshold = vcc/2 with no hysteresis. Phase 3 will replace
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// this with per-logic-family Vil/Vih + Schmitt.
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const half = ownerBoardVcc / 2;
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return createSpiceResolvedPinResolver(id, componentPinName, scheduler, {
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thresholdHigh: half,
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thresholdLow: half,
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vcc: ownerBoardVcc,
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});
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// Phase 3: threshold model from the OWNER BOARD's logic family
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// (e.g. AVR_HC for Uno, LVCMOS33 for ESP32). Includes Schmitt
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// hysteresis when the family declares it. Phase 3 continued
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// will let individual components override via a `logicFamily`
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// field in components-metadata.json so e.g. a 74HC14 input
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// gets Schmitt behavior even when driven from an AVR.
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const family = ownerBoard
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? getBoardLogicFamily(ownerBoard.boardKind)
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: { vcc: ownerBoardVcc, vil: ownerBoardVcc / 2, vih: ownerBoardVcc / 2 };
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return createSpiceResolvedPinResolver(
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id,
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componentPinName,
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scheduler,
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configFromLogicFamily(family),
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);
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}
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return createDefaultPinResolver(
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@ -0,0 +1,232 @@
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/**
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* LogicFamilies — input/output electrical characteristics per logic family.
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*
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* Phase 3 of the mixed-mode simulator project (see
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* `project/sim-mixedmode/phase-03-logic-families.md` in velxio-prod).
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*
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* The point: digital ICs don't all have the same idea of "HIGH" or "LOW".
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* A 5V TTL part guarantees output ≥ 2.4V on HIGH and ≤ 0.4V on LOW,
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* but expects input ≥ 2.0V to read HIGH and ≤ 0.8V to read LOW. A 5V
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* CMOS part has much tighter rails (≥ 4.5V / ≤ 0.5V) and wider input
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* noise margins. Schmitt-trigger inputs (74HC14) add hysteresis so a
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* slowly-rising or noisy input doesn't glitch the output.
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*
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* The SPICE-resolved PinResolver uses these per-family parameters
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* instead of a flat `vcc/2` threshold so that:
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* - circuits that work in real life work in simulation (TTL/CMOS
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* interoperation, noise rejection)
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* - circuits that DON'T work in real life look broken in simulation
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* (e.g. driving a 5V CMOS gate from a 3.3V LVCMOS33 output won't
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* reliably read HIGH — VOH = 3.3V max, Vih for CMOS-5V = 3.5V min)
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*
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* Parameter sources:
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* - 74HC family: TI SN74HC datasheets (VIL = 1.5V, VIH = 3.5V @ 5V Vcc)
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* - 74HCT family: TI SN74HCT (TTL-compatible inputs: VIL = 0.8V, VIH = 2.0V)
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* - 74HC14 Schmitt: TI SN74HC14 (Vt+ ≈ 3.0V, Vt- ≈ 1.6V @ 5V Vcc)
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* - AVR_HC: ATmega328P datasheet section 28.2 (IO DC characteristics)
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* - LVCMOS33: ESP32 / RP2040 / generic 3.3V logic, JEDEC JESD8-7A
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* - TTL: 7400 series classic TTL
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*/
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export interface LogicFamily {
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/** Display name for logs / UI. */
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name: string;
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/** Operating supply voltage in volts. */
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vcc: number;
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/** Max input voltage that still reads LOW. */
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vil: number;
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/** Min input voltage that still reads HIGH. */
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vih: number;
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/**
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* Schmitt-trigger hysteresis thresholds. Set only when the family
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* has Schmitt inputs (74HC14, 74HC13, ESP32 GPIO pins on some
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* speed settings). When set, the PinResolver uses these for
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* threshold conversion and ignores `vil`/`vih`.
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*/
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vil_schmitt?: number;
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vih_schmitt?: number;
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/**
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* Input pin capacitance in pF. Modeled in the netlist as a small
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* cap to GND at the component pin's node. Combined with the source's
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* output impedance this gives a real RC rising/falling edge slope
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* (~50 ns for 30Ω × 5 pF, plenty for ringing to show up at MHz
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* speeds). Typical values: TTL 5-7 pF, CMOS 3-5 pF, Schmitt 7-10 pF.
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*/
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cin_pF: number;
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/** Output low max (driven LOW). */
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vol_max?: number;
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/** Output high min (driven HIGH). */
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voh_min?: number;
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/**
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* Output driver impedance in ohms. Modeled as series R in the
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* netlist between the ngspice voltage source (representing
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* digitalWrite) and the actual pin node. Used by Phase 3+ netlist
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* emission to model real slew rates and current limits.
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*/
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output_impedance_ohm?: number;
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}
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export const FAMILIES = {
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/**
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* Classic 7400-series TTL @ 5V. Wide noise margins, ratty output
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* levels (VOH only guaranteed to 2.4V), high input current. Rare
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* in modern circuits but still found in lab kits.
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*/
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TTL: {
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name: 'TTL',
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vcc: 5,
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vil: 0.8,
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vih: 2.0,
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cin_pF: 5,
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vol_max: 0.4,
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voh_min: 2.4,
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output_impedance_ohm: 80,
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},
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/**
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* 74HC family @ 5V CMOS. Rail-to-rail outputs, wide input noise
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* margins (Vil = 30%·Vcc, Vih = 70%·Vcc). The default for most
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* Arduino-era logic ICs.
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*/
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'CMOS-5V': {
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name: 'CMOS-5V',
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vcc: 5,
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vil: 1.5,
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vih: 3.5,
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cin_pF: 5,
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vol_max: 0.1,
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voh_min: 4.9,
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output_impedance_ohm: 30,
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},
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/**
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* 74HC14, 74HC13, and other Schmitt-trigger inputs @ 5V CMOS.
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* Use the Vt+/Vt- thresholds; the resolver ignores vil/vih when the
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* _schmitt variants are present. Hysteresis ≈ 1.4V (3.0V - 1.6V)
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* per TI's SN74HC14 datasheet.
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*/
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'CMOS-5V-SCHMITT': {
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name: 'CMOS-5V (Schmitt)',
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vcc: 5,
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vil: 1.5,
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vih: 3.5,
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vil_schmitt: 1.6,
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vih_schmitt: 3.0,
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cin_pF: 7,
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vol_max: 0.1,
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voh_min: 4.9,
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output_impedance_ohm: 30,
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},
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/**
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* 74HCT family @ 5V. CMOS internals but TTL-compatible input
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* thresholds (so they can be driven by classic 7400-series outputs).
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* VIH = 2.0V is the giveaway.
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*/
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'CMOS-5V-TTL-INPUTS': {
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name: 'CMOS-5V (TTL inputs)',
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vcc: 5,
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vil: 0.8,
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vih: 2.0,
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cin_pF: 5,
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vol_max: 0.1,
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voh_min: 4.9,
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output_impedance_ohm: 30,
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},
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/**
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* LVCMOS33 — 3.3V CMOS logic with TTL-compatible input thresholds.
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* ESP32 GPIO, RP2040 GPIO, most modern ARM Cortex-M MCUs use this.
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* VIH = 2.0V means a 5V CMOS output (VOH ≥ 4.9V) easily drives it,
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* but a 3.3V output back into a 5V CMOS-input gate is marginal.
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*/
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LVCMOS33: {
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name: 'LVCMOS33',
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vcc: 3.3,
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vil: 0.8,
|
||||
vih: 2.0,
|
||||
cin_pF: 5,
|
||||
vol_max: 0.4,
|
||||
voh_min: 2.4,
|
||||
output_impedance_ohm: 30,
|
||||
},
|
||||
|
||||
/**
|
||||
* AVR/ATmega 5V HC-family. Arduino Uno, Mega, Nano (5V variant).
|
||||
* Documented in ATmega328P datasheet section 28.2.
|
||||
*/
|
||||
AVR_HC: {
|
||||
name: 'AVR (ATmega) 5V',
|
||||
vcc: 5,
|
||||
vil: 1.0,
|
||||
vih: 3.0,
|
||||
cin_pF: 8,
|
||||
vol_max: 0.5,
|
||||
voh_min: 4.2,
|
||||
// Effective output impedance ~25Ω for a 40 mA driver pulling
|
||||
// toward Vcc - 0.7V at Iol=10mA.
|
||||
output_impedance_ohm: 25,
|
||||
},
|
||||
|
||||
/**
|
||||
* Generic 3.3V CMOS — older parts, voltage regulators, sensor breakouts.
|
||||
* Strictly CMOS thresholds (30%/70% of Vcc), NOT TTL-compatible.
|
||||
*/
|
||||
'CMOS-3.3V': {
|
||||
name: 'CMOS-3.3V',
|
||||
vcc: 3.3,
|
||||
vil: 1.0,
|
||||
vih: 2.3,
|
||||
cin_pF: 5,
|
||||
vol_max: 0.1,
|
||||
voh_min: 3.2,
|
||||
output_impedance_ohm: 30,
|
||||
},
|
||||
} as const satisfies Record<string, LogicFamily>;
|
||||
|
||||
export type LogicFamilyId = keyof typeof FAMILIES;
|
||||
|
||||
/**
|
||||
* Map a board kind to its native I/O logic family. Used by
|
||||
* DynamicComponent when constructing a SPICE-resolved PinResolver for a
|
||||
* component pin: the threshold model defaults to whatever the BOARD
|
||||
* drives, unless the component declares its own logicFamily metadata
|
||||
* field (Phase 3 continued — not yet wired in components-metadata.json).
|
||||
*/
|
||||
const BOARD_FAMILY: Record<string, LogicFamilyId> = {
|
||||
'arduino-uno': 'AVR_HC',
|
||||
'arduino-mega': 'AVR_HC',
|
||||
'arduino-nano': 'AVR_HC',
|
||||
attiny85: 'AVR_HC',
|
||||
esp32: 'LVCMOS33',
|
||||
'esp32-c3': 'LVCMOS33',
|
||||
'esp32-s3': 'LVCMOS33',
|
||||
'esp32-cam': 'LVCMOS33',
|
||||
'xiao-esp32-c3': 'LVCMOS33',
|
||||
'xiao-esp32-s3': 'LVCMOS33',
|
||||
'arduino-nano-esp32':'LVCMOS33',
|
||||
'esp32-devkit-c-v4': 'LVCMOS33',
|
||||
'raspberry-pi-pico': 'LVCMOS33',
|
||||
'pi-pico-w': 'LVCMOS33',
|
||||
'raspberry-pi-3': 'LVCMOS33',
|
||||
};
|
||||
|
||||
/**
|
||||
* Lookup the I/O logic family for a board. Falls back to AVR_HC (5V
|
||||
* Arduino) when the board is unknown — that's the most common
|
||||
* fallback and produces conservative thresholds.
|
||||
*/
|
||||
export function getBoardLogicFamily(boardKind: string): LogicFamily {
|
||||
const id = BOARD_FAMILY[boardKind] ?? 'AVR_HC';
|
||||
return FAMILIES[id];
|
||||
}
|
||||
|
||||
/**
|
||||
* Lookup by id with defensive fallback. Useful when a component
|
||||
* declares its `logicFamily` field in metadata as a string — we
|
||||
* resolve it through this helper to avoid runtime errors for typos.
|
||||
*/
|
||||
export function getLogicFamilyById(id: string | null | undefined): LogicFamily | null {
|
||||
if (!id) return null;
|
||||
return (FAMILIES as Record<string, LogicFamily>)[id] ?? null;
|
||||
}
|
||||
|
|
@ -282,17 +282,46 @@ export interface SpiceVoltageSource {
|
|||
}
|
||||
|
||||
interface SpiceResolvedConfig {
|
||||
/** Vcc/2 by default — the threshold above which a voltage reads HIGH.
|
||||
* Phase 3 will replace this with per-logic-family thresholds. */
|
||||
/** Voltage above which a node reads HIGH. For Schmitt-trigger
|
||||
* families this is Vt+ (the rising-edge threshold); for ordinary
|
||||
* CMOS/TTL/AVR it's the family's Vih (typical 0.7·Vcc for CMOS,
|
||||
* 2.0V for TTL/LVCMOS33). */
|
||||
thresholdHigh: number;
|
||||
/** Below this voltage reads LOW. Hysteresis between low/high prevents
|
||||
* oscillation; Phase 3 will refine per Schmitt-trigger inputs. */
|
||||
/** Voltage below which a node reads LOW. Set equal to thresholdHigh
|
||||
* for no hysteresis; set lower for Schmitt-trigger behavior (e.g.
|
||||
* Vt- < Vt+ on 74HC14). Inputs between thresholdLow and
|
||||
* thresholdHigh stay in their previous state — that's what creates
|
||||
* the noise-rejection dead band. */
|
||||
thresholdLow: number;
|
||||
/** Vcc — used to synthesise a digital voltage when the resolver
|
||||
* reports a logic state synchronously and SPICE hasn't yet solved. */
|
||||
vcc: number;
|
||||
}
|
||||
|
||||
/**
|
||||
* Convenience: build a `SpiceResolvedConfig` from a `LogicFamily`.
|
||||
* Hysteresis thresholds are used when the family declares them
|
||||
* (Schmitt-trigger inputs), otherwise vih/vil are used. Keeps callers
|
||||
* from having to know whether a specific family has Schmitt behavior.
|
||||
*
|
||||
* Import-style note: this helper lives here (rather than in
|
||||
* LogicFamilies.ts) so PinResolver stays the single import callers
|
||||
* need for resolver construction. Re-exports avoid the import cycle.
|
||||
*/
|
||||
export function configFromLogicFamily(family: {
|
||||
vcc: number;
|
||||
vil: number;
|
||||
vih: number;
|
||||
vil_schmitt?: number;
|
||||
vih_schmitt?: number;
|
||||
}): SpiceResolvedConfig {
|
||||
return {
|
||||
thresholdHigh: family.vih_schmitt ?? family.vih,
|
||||
thresholdLow: family.vil_schmitt ?? family.vil,
|
||||
vcc: family.vcc,
|
||||
};
|
||||
}
|
||||
|
||||
/**
|
||||
* SPICE-resolved PinResolver — instead of mirroring an Arduino pin's
|
||||
* digital state, it watches a SPICE node's voltage and threshold-
|
||||
|
|
|
|||
Loading…
Reference in New Issue