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feat(esp32s3): use a 49-pin GPIO pinmap for the ESP32-S3 worker 

The S3 has GPIO0..48; the identity pinmap length drives how many pins
picsimlab_wire_gpio connects to the host. Default 40 left GPIO40..48 unwired,
so digitalWrite/Read on those pins never reached the frontend. Build a 49-entry
pinmap when the machine is esp32s3 (mirrors the c3->22 special case). Requires
the GPIO-model widening in libqemu (esp32_gpio bank-1 8->17).
This commit is contained in:
David Montero 2026-07-11 05:11:10 +02:00
parent 305e37561e
commit 2fa5d801ec
1 changed files with 6 additions and 1 deletions
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7
backend/app/services/esp32_worker.py
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@ -268,9 +268,14 @@ def main() -> None: # noqa: C901 (complexity OK for inline worker)
except Exception as _e: # noqa: BLE001
_log(f'[sd] failed to attach microSD: {_e!r}')
# Adjust GPIO pinmap based on chip: ESP32-C3 has only 22 GPIOs
# Adjust GPIO pinmap based on chip: ESP32-C3 has only 22 GPIOs; the
# ESP32-S3 has 49 (GPIO0..48). The identity pinmap's length is what
# picsimlab_wire_gpio iterates, so the S3 needs 49 for pins 40..48 to be
# wired to the host (bank-1 named outputs in the widened esp32_gpio model).
if 'c3' in machine:
_build_pinmap(22)
elif 's3' in machine:
_build_pinmap(49)
# ── 2. Load DLL ───────────────────────────────────────────────────────────
_MINGW64_BIN = r'C:\msys64\mingw64\bin'