From c20b2d5a8e4e59820982cb9079ade2070973d805 Mon Sep 17 00:00:00 2001 From: a2nr Date: Wed, 1 Jul 2026 05:10:38 +0700 Subject: [PATCH] =?UTF-8?q?fix:=20END=20ACK=20regression=20=E2=80=94=20rea?= =?UTF-8?q?dPoll=20pintar=20+=20INIT=5FACK=5FINDEX=200xFFFE=20+=20binary?= =?UTF-8?q?=5Fparser.c=20git=20track?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Akar masalah: - 4a6ef8c menambah binary_parser_reset() di handler re-deploy SERIAL_BRIDGE yang menghapus expected_total_crc setelah INIT — menyebabkan CRC mismatch di END. Source 1d3a489 sudah menghapus reset-nya, tapi device butuh rebuild. - cad90eb merutekan DATA melalui sendCommand() dengan readPoll state===1 yang selalu true saat DATA — write gagal dilaporkan sukses. Perbaikan: 1. readPoll pintar untuk DATA: state===1 tidak lagi dianggap sukses. readPoll hanya fast-fail di state>=5; deadline fallback hanya ok jika writeValueWithResponse sukses (GATT write response = bukti delivery). 2. INIT_ACK_INDEX=0xFFFE (Fase 3): inisialisasi INIT dengan index unik menghilangkan tabrakan dengan DATA[0] (index 0). binary_parser.c echo index recv di ACK INIT. Guard handleFlashingNotification diperluas. 3. pendingAcks.clear() di awal deployHex mencegah poisoning antar deploy. 4. Track firmware inti ke git: binary_parser.c, checksum.c, stk500v1.c, usb_host.c + headers + CMakeLists + sdkconfig + partitions. Build: ESP-IDF v6, ESP32-S3, flash via /dev/ttyACM0 --- frontend/src/lib/services/ble-deployer.ts | 59 +- frontend/src/lib/types/deployer.ts | 43 + velxio-deployer-firmware/CMakeLists.txt | 3 + velxio-deployer-firmware/README.md | 106 + velxio-deployer-firmware/dependencies.lock | 18 + velxio-deployer-firmware/main/CMakeLists.txt | 14 + velxio-deployer-firmware/main/binary_parser.c | 144 + velxio-deployer-firmware/main/binary_parser.h | 56 + velxio-deployer-firmware/main/ble_service.h | 65 + velxio-deployer-firmware/main/checksum.c | 30 + velxio-deployer-firmware/main/checksum.h | 20 + .../main/idf_component.yml | 3 + velxio-deployer-firmware/main/state_machine.h | 53 + velxio-deployer-firmware/main/stk500v1.c | 270 + velxio-deployer-firmware/main/stk500v1.h | 70 + velxio-deployer-firmware/main/usb_host.c | 218 + velxio-deployer-firmware/main/usb_host.h | 89 + velxio-deployer-firmware/partitions.csv | 6 + velxio-deployer-firmware/sdkconfig | 4584 +++++++++++++++++ velxio-deployer-firmware/sdkconfig.defaults | 50 + 20 files changed, 5875 insertions(+), 26 deletions(-) create mode 100644 frontend/src/lib/types/deployer.ts create mode 100644 velxio-deployer-firmware/CMakeLists.txt create mode 100644 velxio-deployer-firmware/README.md create mode 100644 velxio-deployer-firmware/dependencies.lock create mode 100644 velxio-deployer-firmware/main/CMakeLists.txt create mode 100644 velxio-deployer-firmware/main/binary_parser.c create mode 100644 velxio-deployer-firmware/main/binary_parser.h create mode 100644 velxio-deployer-firmware/main/ble_service.h create mode 100644 velxio-deployer-firmware/main/checksum.c create mode 100644 velxio-deployer-firmware/main/checksum.h create mode 100644 velxio-deployer-firmware/main/idf_component.yml create mode 100644 velxio-deployer-firmware/main/state_machine.h create mode 100644 velxio-deployer-firmware/main/stk500v1.c create mode 100644 velxio-deployer-firmware/main/stk500v1.h create mode 100644 velxio-deployer-firmware/main/usb_host.c create mode 100644 velxio-deployer-firmware/main/usb_host.h create mode 100644 velxio-deployer-firmware/partitions.csv create mode 100644 velxio-deployer-firmware/sdkconfig create mode 100644 velxio-deployer-firmware/sdkconfig.defaults diff --git a/frontend/src/lib/services/ble-deployer.ts b/frontend/src/lib/services/ble-deployer.ts index 04c1b76..aa61c7d 100644 --- a/frontend/src/lib/services/ble-deployer.ts +++ b/frontend/src/lib/services/ble-deployer.ts @@ -3,7 +3,7 @@ import { BLE_CHAR_FLASHING_UUID, BLE_CHAR_SERIAL_UUID, CMD_INIT, CMD_DATA, CMD_END, CMD_ACK, CMD_ERR, - CHUNK_SIZE, BLE_TIMEOUT_MS, END_TIMEOUT_MS, END_ACK_INDEX, MAX_RETRIES, + CHUNK_SIZE, BLE_TIMEOUT_MS, END_TIMEOUT_MS, END_ACK_INDEX, INIT_ACK_INDEX, MAX_RETRIES, type DeployProgress, type BLEACKResponse } from '$types/deployer'; @@ -155,11 +155,13 @@ export class BLEHardwareDeployer { this.ackResolvers.delete(index); clearTimeout(pending.timer); pending.resolve(ack); - } else if (this.ackResolvers.has(0xFFFF) && index !== 0xFFFF) { + } else if ((this.ackResolvers.has(0xFFFF) || this.ackResolvers.has(INIT_ACK_INDEX)) && index !== 0xFFFF && index !== INIT_ACK_INDEX) { // No one waiting for this specific index right now, - // but someone IS waiting for END (0xFFFF) — don't - // let a stale chunk ACK resolve it. - logAck(cmdName, `index=${index} no resolver, END waitForAck(0xFFFF) active — dropping stale ACK`); + // but someone IS waiting for END (0xFFFF) or INIT + // (INIT_ACK_INDEX) — don't let a stale chunk ACK + // resolve them. Only END/INIT sentinel ACKs are + // relevant while these waits are active. + logAck(cmdName, `index=${index} no resolver, waitForAck(0xFFFF/0xFFFE) active — dropping stale ACK`); } else { // Cache for a future waitForAck call logAck(cmdName, `index=${index} no resolver — caching as pendingAck`); @@ -193,9 +195,13 @@ export class BLEHardwareDeployer { console.log(`[BLE] deployHex: ${binaryData.length} bytes, ${totalChunks} chunks, CRC=0x${totalCRC.toString(16)}`); + /* Clear stale ACKs from a previous deploy (prevents cross-deploy + * poisoning where a late ACK from deploy N resolves deploy N+1). */ + this.pendingAcks.clear(); + onProgress({ state: 'transferring', message: 'Mengirim INIT...', totalChunks, completedChunks: 0 }); console.log('[BLE] D: sending INIT...'); - await this.sendCommand(CMD_INIT, 0, this.uint32ToBytes(totalCRC)); + await this.sendCommand(CMD_INIT, INIT_ACK_INDEX, this.uint32ToBytes(totalCRC)); console.log('[BLE] D: INIT done'); for (let i = 0; i < totalChunks; i++) { @@ -246,6 +252,7 @@ export class BLEHardwareDeployer { ], 4 + data.length); const ackTimeout = timeoutMs ?? BLE_TIMEOUT_MS; + let writeSucceeded = false; console.log(`[BLE-CMD] ${cmdName} idx=${index}: waitForAck timeout=${ackTimeout}ms start`); const ackPromise = this.waitForAck(index, ackTimeout); try { @@ -255,6 +262,7 @@ export class BLEHardwareDeployer { 3000, 'writeValueWithResponse' ); + writeSucceeded = true; console.log(`[BLE-CMD] ${cmdName} idx=${index}: write done, now waiting for ACK...`); } catch (e) { console.log(`[BLE-CMD] ${cmdName} idx=${index}: write failed, still waiting for ACK`, e); @@ -347,10 +355,12 @@ export class BLEHardwareDeployer { return; } - /* INIT/DATA: Same Android notify idle-drop bug affects these too. - * Race ackPromise against readValue() state poll as fallback. - * INIT success: firmware state >= RECEIVING(1) (not IDLE/ERROR). - * DATA success: firmware state == RECEIVING(1). */ + /* INIT: Firmware sets state to RECEIVING(1) on success — poll for it. + * DATA: ACK notify confirms per-chunk CRC. Since state=1 is always + * true during DATA phase, readPoll cannot confirm a specific chunk. + * Instead, readPoll fast-fails on ERROR state (>=5). At deadline, if + * write succeeded (writeValueWithResponse confirms firmware processed + * the chunk), return ok. Otherwise return timeout for retry. */ if (cmd === CMD_INIT || cmd === CMD_DATA) { const readPoll = (async () => { const deadline = Date.now() + ackTimeout; @@ -364,25 +374,16 @@ export class BLEHardwareDeployer { const state = dv.getUint8(0); console.log(`[BLE-CMD] ${cmdName}: readValue state=${state}`); - /* INIT: any non-IDLE(0), non-ERROR(5/6) state means command was processed. - * DATA: state must stay RECEIVING(1) — error if >=5. */ - if (cmd === CMD_INIT) { - /* Only RECEIVING(1) means INIT was processed. - * Don't accept FLASHING(3) or SERIAL_BRIDGE(4) — - * those are stale states from a previous deploy. */ - if (state === 1) { - console.log(`[BLE-CMD] ${cmdName}: state=1 (RECEIVING) — INIT confirmed via read poll`); - return 'ok' as const; - } - } else { /* DATA */ - if (state === 1) { - console.log(`[BLE-CMD] ${cmdName}: state=1 (RECEIVING) — DATA confirmed via read poll`); - return 'ok' as const; - } - } if (state >= 5) { throw new Error(`Firmware error (state=${state})`); } + /* INIT: Only RECEIVING(1) means command was processed. + * Don't accept FLASHING(3) or SERIAL_BRIDGE(4) — + * those are stale states from a previous deploy. */ + if (cmd === CMD_INIT && state === 1) { + console.log(`[BLE-CMD] ${cmdName}: state=1 (RECEIVING) — INIT confirmed via read poll`); + return 'ok' as const; + } } catch (e) { if (!this.isConnected) { throw new Error('Koneksi BLE terputus'); @@ -391,6 +392,12 @@ export class BLEHardwareDeployer { } await new Promise(r => setTimeout(r, 200)); } + /* Deadline reached. For DATA: writeValueWithResponse confirms + * the firmware processed the chunk (GATT write response). */ + if (cmd === CMD_DATA && writeSucceeded) { + console.log(`[BLE-CMD] ${cmdName}: deadline, write succeeded — treating as ok`); + return 'ok' as const; + } console.log(`[BLE-CMD] ${cmdName}: readPoll deadline passed (${ackTimeout}ms)`); return 'timeout' as const; })(); diff --git a/frontend/src/lib/types/deployer.ts b/frontend/src/lib/types/deployer.ts new file mode 100644 index 0000000..9c44cf7 --- /dev/null +++ b/frontend/src/lib/types/deployer.ts @@ -0,0 +1,43 @@ +export type DeployState = + | 'idle' + | 'compiling' + | 'pairing' + | 'transferring' + | 'flashing' + | 'serial_bridge' + | 'success' + | 'error'; + +export interface DeployProgress { + state: DeployState; + message: string; + totalChunks: number; + completedChunks: number; + bytesPerSecond?: number; +} + +export interface BLEACKResponse { + command: number; + index: number; + status: 'OK' | 'ERROR'; + message?: string; +} + +export const BLE_SERVICE_UUID = '56454c58-494f-0000-0000-000000000001'; +export const BLE_CHAR_FLASHING_UUID = '56454c58-494f-0000-0000-000000000002'; +export const BLE_CHAR_SERIAL_UUID = '56454c58-494f-0000-0000-000000000003'; + +export const CMD_INIT = 0x01; +export const CMD_DATA = 0x02; +export const CMD_END = 0x03; +export const CMD_ACK = 0x04; +export const CMD_ERR = 0x05; + +export const CHUNK_SIZE = 240; +export const BLE_TIMEOUT_MS = 5000; +export const END_TIMEOUT_MS = 30000; +export const MAX_RETRIES = 3; +/** Unique ACK index for INIT (disambiguates from DATA chunk index 0). */ +export const INIT_ACK_INDEX = 0xFFFE; +/** Unique ACK index sent by firmware after flash completes (disambiguates from INIT ACK). */ +export const END_ACK_INDEX = 0xFFFF; diff --git a/velxio-deployer-firmware/CMakeLists.txt b/velxio-deployer-firmware/CMakeLists.txt new file mode 100644 index 0000000..0afc853 --- /dev/null +++ b/velxio-deployer-firmware/CMakeLists.txt @@ -0,0 +1,3 @@ +cmake_minimum_required(VERSION 3.16) +include($ENV{IDF_PATH}/tools/cmake/project.cmake) +project(velxio-deployer) diff --git a/velxio-deployer-firmware/README.md b/velxio-deployer-firmware/README.md new file mode 100644 index 0000000..e1753f4 --- /dev/null +++ b/velxio-deployer-firmware/README.md @@ -0,0 +1,106 @@ +# Velxio BLE Deployer — Firmware ESP32-S3 + +Firmware untuk ESP32-S3 N16R8 yang bertindak sebagai **BLE-to-USB bridge** untuk flashing Arduino Uno/Nano via Web Bluetooth. + +## Persyaratan + +- [ESP-IDF v6.0](https://docs.espressif.com/projects/esp-idf/en/v6.0/esp32s3/get-started/index.html) +- ESP32-S3 dev board (N16R8 — 16MB Flash + 8MB PSRAM) +- Kabel USB-C (data) untuk menghubungkan ke Arduino (USB OTG GPIO19/20) +- Debug log via UART0 (USB-to-UART bridge devkit) + +## Setup + +```bash +# Export ESP-IDF environment +source /home/a2nr/Downloads/lms-c/esp-idf-v6/export.sh + +# Build +idf.py build + +# Flash (ganti /dev/ttyACM0 sesuai port) +idf.py -p /dev/ttyACM0 flash monitor +``` + +## Konfigurasi + +Variabel utama di `sdkconfig.defaults`: + +| Konfigurasi | Nilai | Keterangan | +|------------|-------|------------| +| `CONFIG_IDF_TARGET` | `esp32s3` | Target chip (WAJIB, bukan esp32) | +| `CONFIG_BT_NIMBLE_SVC_GAP_DEVICE_NAME` | `Velxio-Deployer` | Nama BLE yang tampil di browser | +| `CONFIG_BT_NIMBLE_ATT_PREFERRED_MTU` | `255` | Ukuran MTU BLE | +| `CONFIG_SPIRAM` | `y` | PSRAM enabled | +| `CONFIG_SPIRAM_MODE_OCT` | `y` | Octal mode (N16R8) | +| `CONFIG_ESPTOOLPY_FLASHSIZE_16MB` | `y` | Flash 16MB | +| `CONFIG_CHERRYUSB_HOST_CDC_ACM` | `y` | USB Host CDC (CherryUSB) | +| `CONFIG_ESP_CONSOLE_UART_DEFAULT` | `y` | Debug via UART0 (bukan USB-JTAG) | + +## Partisi Flash + +| Partisi | Ukuran | Fungsi | +|---------|--------|--------| +| ota_0 | 3 MB | Firmware utama | +| ota_1 | 3 MB | OTA update | +| storage | ~10 MB | SPIFFS untuk log/filesystem | + +## Arsitektur Komponen + +``` +main.c +├── ble_service.c # NimBLE peripheral (2 karakteristik) +├── binary_parser.c # Parser payload binary (INIT/DATA/END) +├── checksum.c # CRC32 +├── usb_host.c # CherryUSB Host (CDC) — belum lengkap +├── stk500v1.c # STK500v1 flashing protocol — belum lengkap +├── state_machine.c # Finite state machine +├── serial_bridge.c # USB CDC ↔ BLE Notify bridge +└── led_button.c # LED RGB + Retry button +``` + +## Protokol BLE + +``` +Service: 56454c58-494f-0000-0000-000000000001 +Flashing: 56454c58-494f-0000-0000-000000000002 (Write+Resp + Notify) +Serial: 56454c58-494f-0000-0000-000000000003 (WriteWO+Resp + Notify) +``` + +Payload format: `[CMD:1][Index:2 LE][Len:1][Data:N ≤240][CRC32:4 LE]` + +### Catatan UUID (PENTING) + +UUID di firmware menggunakan `BLE_UUID128_INIT` dengan byte order **little-endian**: +```c +// 56454C58-494F-0000-0000-000000000001 +BLE_UUID128_INIT( + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x4F, 0x49, 0x58, 0x4C, 0x45, 0x56 +) +``` + +## Testing (tanpa Web Bluetooth) + +Gunakan `nRF Connect` Android untuk test BLE: +1. Scan → pilih "Velxio-Deployer" (nama pendek "Velxio" di adv data) +2. Connect → MTU otomatis ter-negosiasi ke 255 +3. Subscribe ke karakteristik Flashing (Notify) +4. Kirim payload INIT: `01 00 00 04 [CRC-total(4)] [CRC-packet(4)]` +5. Kirim payload DATA: `02 [idx(2)] [len] [data...] [CRC(4)]` +6. Kirim payload END: `03 00 00 04 [CRC-total(4)] [CRC-packet(4)]` + +## Status Development + +| Fase | Status | Keterangan | +|------|--------|------------| +| F0 Environment | Selesai | ESP-IDF v6.0 terinstall | +| F1 Project config | Selesai | Target esp32s3, PSRAM, CherryUSB | +| F2 BLE service | Selesai | UUID branded hex, adv data, MTU 255 | +| F3 Protocol/ACK | Selesai | END ACK setelah flash, parse error fix | +| F4 STK500v1 | Belum | Implementasi lengkap | +| F5 USB Host | Belum | CherryUSB RX claim/unclaim | +| F6 Serial bridge | Belum | Throttle + LED polish | +| F7 Frontend | Selesai | UUID, chunk 240, requestMTU | +| F8 Dokumen | Selesai | Dokumen ini | +| F9 Testing | Belum | Progressive integration test | diff --git a/velxio-deployer-firmware/dependencies.lock b/velxio-deployer-firmware/dependencies.lock new file mode 100644 index 0000000..99914bf --- /dev/null +++ b/velxio-deployer-firmware/dependencies.lock @@ -0,0 +1,18 @@ +dependencies: + cherry-embedded/cherryusb: + component_hash: b8b0db4ed23d32e01ec41138600fb014bcf060a34b541daba1fca6ed22a61dfc + dependencies: [] + source: + registry_url: https://components.espressif.com/ + type: service + version: 1.6.1 + idf: + source: + type: idf + version: 6.0.1 +direct_dependencies: +- cherry-embedded/cherryusb +- idf +manifest_hash: 2c2aa30e38426bfc9f94d294becfce085d82f528b9a906d311652fd3ff99b537 +target: esp32s3 +version: 3.0.0 diff --git a/velxio-deployer-firmware/main/CMakeLists.txt b/velxio-deployer-firmware/main/CMakeLists.txt new file mode 100644 index 0000000..fba34a7 --- /dev/null +++ b/velxio-deployer-firmware/main/CMakeLists.txt @@ -0,0 +1,14 @@ +idf_component_register( + SRCS + main.c + ble_service.c + binary_parser.c + checksum.c + usb_host.c + stk500v1.c + state_machine.c + serial_bridge.c + led_button.c + INCLUDE_DIRS + . +) diff --git a/velxio-deployer-firmware/main/binary_parser.c b/velxio-deployer-firmware/main/binary_parser.c new file mode 100644 index 0000000..c3ffdae --- /dev/null +++ b/velxio-deployer-firmware/main/binary_parser.c @@ -0,0 +1,144 @@ +#include +#include +#include "esp_log.h" +#include "esp_heap_caps.h" +#include "binary_parser.h" +#include "checksum.h" +#include "ble_service.h" + +static const char *TAG = "BIN_PARSER"; + +static parser_state_t state = PARSER_IDLE; +static uint8_t *hex_buffer = NULL; +static size_t buffer_offset = 0; +static size_t buffer_size = 0; +static uint32_t expected_total_crc = 0; +static int total_chunks = 0; +static int received_chunks = 0; + +void binary_parser_init(void) +{ + hex_buffer = (uint8_t *)heap_caps_malloc(MAX_HEX_SIZE, MALLOC_CAP_SPIRAM); + if (hex_buffer) { + ESP_LOGI(TAG, "PSRAM buffer allocated: %d bytes at %p", MAX_HEX_SIZE, hex_buffer); + } else { + ESP_LOGE(TAG, "Failed to allocate PSRAM buffer!"); + hex_buffer = malloc(MAX_HEX_SIZE); + if (hex_buffer) { + ESP_LOGW(TAG, "Fallback to SRAM buffer: %d bytes", MAX_HEX_SIZE); + } + } +} + +parser_state_t binary_parser_process_packet(uint8_t *payload, size_t len) +{ + if (len < 8) return PARSER_ERROR; + if (!hex_buffer) return PARSER_ERROR; + + uint8_t cmd = payload[0]; + uint16_t index = payload[1] | (payload[2] << 8); + uint8_t data_len = payload[3]; + + if (4 + data_len + 4 > len) return PARSER_ERROR; + + uint8_t *data = payload + 4; + uint32_t received_crc = (uint32_t)payload[4 + data_len] | + ((uint32_t)payload[4 + data_len + 1] << 8) | + ((uint32_t)payload[4 + data_len + 2] << 16) | + ((uint32_t)payload[4 + data_len + 3] << 24); + + switch (cmd) { + case CMD_INIT: { + if (data_len >= 4) { + expected_total_crc = (uint32_t)data[0] | + ((uint32_t)data[1] << 8) | + ((uint32_t)data[2] << 16) | + ((uint32_t)data[3] << 24); + } + buffer_offset = 0; + buffer_size = 0; + received_chunks = 0; + total_chunks = 0; + memset(hex_buffer, 0, MAX_HEX_SIZE); + state = PARSER_RECEIVING; + ESP_LOGI(TAG, "INIT: expected total CRC = 0x%08lX", (unsigned long)expected_total_crc); + + /* Echo the received index so the webapp can distinguish INIT ACK + * from DATA chunk-0 ACK (both would be index 0 if hardcoded). + * Webapp sends INIT with INIT_ACK_INDEX (0xFFFE) for uniqueness. */ + uint8_t ack[] = {CMD_ACK, index & 0xFF, (index >> 8) & 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00}; + ble_service_send_notify_flashing(ack, sizeof(ack)); + break; + } + + case CMD_DATA: { + if (state != PARSER_RECEIVING) return PARSER_ERROR; + + uint32_t chunk_crc = checksum_crc32(data, data_len); + if (chunk_crc != received_crc) { + ESP_LOGE(TAG, "CRC mismatch chunk %d: expected 0x%08lX, got 0x%08lX", + index, (unsigned long)received_crc, (unsigned long)chunk_crc); + uint8_t err[] = {CMD_ERR, index & 0xFF, (index >> 8) & 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00}; + ble_service_send_notify_flashing(err, sizeof(err)); + return PARSER_ERROR; + } + + if (buffer_offset + data_len <= MAX_HEX_SIZE) { + memcpy(hex_buffer + buffer_offset, data, data_len); + buffer_offset += data_len; + received_chunks++; + } else { + ESP_LOGE(TAG, "Buffer overflow!"); + state = PARSER_ERROR; + return PARSER_ERROR; + } + + uint8_t ack[] = {CMD_ACK, index & 0xFF, (index >> 8) & 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00}; + ble_service_send_notify_flashing(ack, sizeof(ack)); + break; + } + + case CMD_END: { + buffer_size = buffer_offset; + state = PARSER_COMPLETE; + ESP_LOGI(TAG, "END: %d bytes in %d chunks, buffer_size=%d", + buffer_size, received_chunks, (int)buffer_size); + break; + } + + default: + return PARSER_ERROR; + } + + return state; +} + +uint32_t binary_parser_get_total_crc(void) +{ + return expected_total_crc; +} + +uint8_t *binary_parser_get_buffer(void) +{ + return hex_buffer; +} + +size_t binary_parser_get_buffer_size(void) +{ + return buffer_size; +} + +void binary_parser_reset(void) +{ + state = PARSER_IDLE; + buffer_offset = 0; + buffer_size = 0; + received_chunks = 0; + total_chunks = 0; + expected_total_crc = 0; +} + +parser_state_t binary_parser_get_state(void) +{ + return state; +} diff --git a/velxio-deployer-firmware/main/binary_parser.h b/velxio-deployer-firmware/main/binary_parser.h new file mode 100644 index 0000000..97f3b34 --- /dev/null +++ b/velxio-deployer-firmware/main/binary_parser.h @@ -0,0 +1,56 @@ +/** + * @file binary_parser.h + * @brief Binary payload parser for the BLE flashing protocol. + * + * Implements the 4-command protocol: + * INIT (0x01) — start transfer, receive expected total CRC + * DATA (0x02) — chunk of hex binary with per-chunk CRC32 + * END (0x03) — finalise, verify accumulated CRC against expected + * ACK (0x04) — acknowledgement (sent by firmware) + * ERR (0x05) — error indication (sent by firmware) + * + * Payload format: [CMD:1][Index:2][Len:1][Data:N][CRC32:4] + * + * Buffer allocated in PSRAM via heap_caps_malloc(MALLOC_CAP_SPIRAM). + */ + +#pragma once + +#include +#include + +#define CMD_INIT 0x01 +#define CMD_DATA 0x02 +#define CMD_END 0x03 +#define CMD_ACK 0x04 +#define CMD_ERR 0x05 + +/** Maximum hex binary buffer size (256 KB — fits largest Arduino sketch). */ +#define MAX_HEX_SIZE (256 * 1024) + +/** Parser finite state. */ +typedef enum { + PARSER_IDLE, /**< Waiting for INIT. */ + PARSER_RECEIVING, /**< Actively receiving DATA chunks. */ + PARSER_COMPLETE, /**< All data received and CRC verified. */ + PARSER_ERROR /**< CRC mismatch or protocol violation. */ +} parser_state_t; + +/** + * @brief Single binary packet descriptor (for inspection/debugging). + */ +typedef struct { + uint8_t command; /**< CMD_INIT / CMD_DATA / CMD_END */ + uint16_t index; /**< Chunk index (little-endian) */ + uint8_t length; /**< Number of data bytes in this packet */ + uint8_t *data; /**< Pointer to data portion */ + uint32_t crc32; /**< CRC32 value from packet trailer */ +} binary_packet_t; + +void binary_parser_init(void); +parser_state_t binary_parser_process_packet(uint8_t *payload, size_t len); +uint32_t binary_parser_get_total_crc(void); +uint8_t *binary_parser_get_buffer(void); +size_t binary_parser_get_buffer_size(void); +void binary_parser_reset(void); +parser_state_t binary_parser_get_state(void); diff --git a/velxio-deployer-firmware/main/ble_service.h b/velxio-deployer-firmware/main/ble_service.h new file mode 100644 index 0000000..83329f1 --- /dev/null +++ b/velxio-deployer-firmware/main/ble_service.h @@ -0,0 +1,65 @@ +/** + * @file ble_service.h + * @brief BLE Peripheral service using NimBLE stack. + * + * Manages advertising, connection, and two custom GATT characteristics: + * - Flashing (Write with Response + Notify): for binary payload transfer + * - Serial (Write Without Response + Notify): for transparent UART bridge + * + * Service UUID: 56454c58-494f-0000-0000-000000000001 + */ + +#pragma once + +#include +#include + +#define BLE_SERVICE_UUID "56454c58-494f-0000-0000-000000000001" +#define BLE_CHAR_FLASHING_UUID "56454c58-494f-0000-0000-000000000002" +#define BLE_CHAR_SERIAL_UUID "56454c58-494f-0000-0000-000000000003" + +/** + * @brief Callback for incoming data on the Flashing characteristic. + * @param data Pointer to received payload bytes + * @param len Number of bytes received + */ +typedef void (*ble_data_cb_t)(uint8_t *data, size_t len); + +/** + * @brief Callback for incoming data on the Serial characteristic (Write Without Response). + */ +typedef void (*ble_serial_cb_t)(uint8_t *data, size_t len); + +/** + * @brief Initialize NimBLE stack, register GATT services, start advertising. + */ +void ble_service_init(void); + +/** + * @brief Register callback for Flashing characteristic write events. + */ +void ble_service_set_flashing_callback(ble_data_cb_t cb); + +/** + * @brief Register callback for Serial characteristic write events. + * Receives raw bytes from Webapp → forwarded to Arduino via USB CDC. + */ +void ble_service_set_serial_callback(ble_serial_cb_t cb); + +/** + * @brief Send a BLE Notification on the Flashing characteristic. + * Used to send ACK/ERR responses back to the Webapp. + */ +void ble_service_send_notify_flashing(uint8_t *data, size_t len); + +/** + * @brief Send a BLE Notification on the Serial characteristic. + * Used to forward Arduino serial output to the Webapp. + */ +void ble_service_send_notify_serial(uint8_t *data, size_t len); + +/** + * @brief Check if a BLE central is currently connected. + * @return true if connected + */ +bool ble_service_is_connected(void); diff --git a/velxio-deployer-firmware/main/checksum.c b/velxio-deployer-firmware/main/checksum.c new file mode 100644 index 0000000..528917d --- /dev/null +++ b/velxio-deployer-firmware/main/checksum.c @@ -0,0 +1,30 @@ +#include "checksum.h" + +static uint32_t crc32_table[256]; +static int table_initialized = 0; + +static void crc32_init_table(void) +{ + for (uint32_t i = 0; i < 256; i++) { + uint32_t c = i; + for (int j = 0; j < 8; j++) { + c = (c & 1) ? (0xEDB88320 ^ (c >> 1)) : (c >> 1); + } + crc32_table[i] = c; + } + table_initialized = 1; +} + +uint32_t checksum_crc32(const uint8_t *data, size_t len) +{ + if (!table_initialized) { + crc32_init_table(); + } + if (!data || len == 0) return 0; + + uint32_t crc = 0xFFFFFFFF; + for (size_t i = 0; i < len; i++) { + crc = crc32_table[(crc ^ data[i]) & 0xFF] ^ (crc >> 8); + } + return crc ^ 0xFFFFFFFF; +} diff --git a/velxio-deployer-firmware/main/checksum.h b/velxio-deployer-firmware/main/checksum.h new file mode 100644 index 0000000..b65589c --- /dev/null +++ b/velxio-deployer-firmware/main/checksum.h @@ -0,0 +1,20 @@ +/** + * @file checksum.h + * @brief CRC32 checksum with pre-computed lookup table. + * + * Uses the standard IEEE 802.3 polynomial (0xEDB88320). + * Table is initialised on first call, cached for subsequent calls. + */ + +#pragma once + +#include +#include + +/** + * @brief Compute CRC32 over a memory buffer. + * @param data Pointer to input bytes + * @param len Number of bytes + * @return CRC32 value (reflected, final XOR 0xFFFFFFFF) + */ +uint32_t checksum_crc32(const uint8_t *data, size_t len); diff --git a/velxio-deployer-firmware/main/idf_component.yml b/velxio-deployer-firmware/main/idf_component.yml new file mode 100644 index 0000000..3789151 --- /dev/null +++ b/velxio-deployer-firmware/main/idf_component.yml @@ -0,0 +1,3 @@ +dependencies: + cherry-embedded/cherryusb: "^1.6.1" + idf: ">=4.4" diff --git a/velxio-deployer-firmware/main/state_machine.h b/velxio-deployer-firmware/main/state_machine.h new file mode 100644 index 0000000..9f18945 --- /dev/null +++ b/velxio-deployer-firmware/main/state_machine.h @@ -0,0 +1,53 @@ +/** + * @file state_machine.h + * @brief Finite state machine orchestrating the deploy lifecycle. + * + * States: + * IDLE -> RECEIVING -> VERIFYING -> FLASHING -> SERIAL_BRIDGE + * | + * ERROR_CHECKSUM <--- VERIFY_FAIL | + * ERROR_TARGET <--- FLASH_FAIL / USB_DISCONNECT <----+ + * + * Transitions are driven by events from BLE, USB, and the button. + * + * Flashing runs in a dedicated flasher_task (created in state_machine_init), + * so the BLE host thread is never blocked for the ~8s flash duration. The + * VERIFYING -> FLASHING transition hands off via flasher_sem; the flasher + * task posts EVENT_FLASH_OK / EVENT_FLASH_FAIL back into the SM when done. + */ + +#pragma once + +#include +#include + +/** System states. */ +typedef enum { + STATE_IDLE, /**< Waiting for BLE INIT command */ + STATE_RECEIVING, /**< Receiving binary chunks via BLE */ + STATE_VERIFYING, /**< CRC32 verification of accumulated buffer */ + STATE_FLASHING, /**< Programming Arduino via STK500v1 */ + STATE_SERIAL_BRIDGE, /**< Transparent CDC <-> BLE bridge active */ + STATE_ERROR_TARGET, /**< USB/STK500 failure — LED red, wait for Retry */ + STATE_ERROR_CHECKSUM /**< CRC mismatch — LED red blink, wait for Retry */ +} deployer_state_t; + +/** Events that trigger state transitions. */ +typedef enum { + EVENT_BLE_INIT, /**< Received INIT command from BLE */ + EVENT_BLE_DATA, /**< Received DATA chunk (internal) */ + EVENT_BLE_END, /**< Received END command */ + EVENT_VERIFY_OK, /**< CRC32 verification passed */ + EVENT_VERIFY_FAIL, /**< CRC32 verification failed */ + EVENT_FLASH_OK, /**< STK500v1 flashing succeeded (posted by flasher task) */ + EVENT_FLASH_FAIL, /**< STK500v1 flashing failed (posted by flasher task) */ + EVENT_BUTTON_RETRY, /**< Physical Retry button pressed */ + EVENT_BLE_DISCONNECT, /**< BLE link lost */ + EVENT_USB_DISCONNECT /**< Arduino USB disconnected */ +} sm_event_t; + +void state_machine_init(void); +void state_machine_process_event(sm_event_t event, void *data); +deployer_state_t state_machine_get_current(void); +const char *state_machine_get_state_name(void); +void state_machine_tick(void); diff --git a/velxio-deployer-firmware/main/stk500v1.c b/velxio-deployer-firmware/main/stk500v1.c new file mode 100644 index 0000000..15a9dcd --- /dev/null +++ b/velxio-deployer-firmware/main/stk500v1.c @@ -0,0 +1,270 @@ +#include +#include "esp_log.h" +#include "esp_timer.h" +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" +#include "stk500v1.h" +#include "usb_host.h" + +static const char *TAG = "STK500"; + +/* Read exactly resp_len bytes within timeout_ms. Returns true on success. */ +static bool read_exact(uint8_t *buf, size_t resp_len, uint32_t timeout_ms) +{ + size_t got = 0; + int64_t deadline = esp_timer_get_time() + (int64_t)timeout_ms * 1000; + + while (got < resp_len) { + int64_t remaining_us = deadline - esp_timer_get_time(); + if (remaining_us <= 0) { + ESP_LOGE(TAG, "read_exact timeout: got %d/%d", (int)got, (int)resp_len); + return false; + } + uint32_t chunk_to = (uint32_t)((remaining_us + 999) / 1000); + if (chunk_to == 0) chunk_to = 1; + + int n = usb_host_read_cdc(buf + got, resp_len - got, chunk_to); + if (n < 0) { + /* timeout or error on this chunk — keep trying until deadline */ + continue; + } + if (n > 0) { + got += (size_t)n; + } + } + return true; +} + +/* Send a command (already includes CRC_EOP), then expect STK_INSYNC and + * optional payload + STK_OK. strict_ok=true requires the trailing STK_OK. */ +static bool send_and_expect(const uint8_t *cmd, size_t cmd_len, + uint8_t *resp, size_t resp_len, + uint32_t timeout_ms, bool strict_ok) +{ + if (!usb_host_write_cdc(cmd, cmd_len)) { + ESP_LOGE(TAG, "send failed (%d bytes)", (int)cmd_len); + return false; + } + + uint8_t insync = 0; + if (!read_exact(&insync, 1, timeout_ms)) { + ESP_LOGE(TAG, "no INSYNC (got 0x%02X)", insync); + return false; + } + if (insync == STK_NOSYNC) { + ESP_LOGE(TAG, "optiboot replied NOSYNC"); + return false; + } + if (insync != STK_INSYNC) { + ESP_LOGE(TAG, "expected INSYNC 0x14, got 0x%02X", insync); + return false; + } + + if (resp && resp_len > 0) { + if (!read_exact(resp, resp_len, timeout_ms)) { + ESP_LOGE(TAG, "payload read failed (%d bytes)", (int)resp_len); + return false; + } + } + + if (strict_ok) { + uint8_t ok = 0; + if (!read_exact(&ok, 1, timeout_ms)) { + ESP_LOGE(TAG, "no STK_OK"); + return false; + } + if (ok != STK_OK) { + ESP_LOGE(TAG, "expected OK 0x10, got 0x%02X", ok); + return false; + } + } + return true; +} + +bool stk500v1_init(void) +{ + ESP_LOGI(TAG, "STK500v1 layer initialised (optiboot / ATmega328P)"); + return true; +} + +static bool cmd_get_sync(void) +{ + uint8_t cmd[] = { STK_GET_SYNC, STK_CRC_EOP }; + + for (int attempt = 0; attempt < STK_SYNC_RETRIES; attempt++) { + if (send_and_expect(cmd, sizeof(cmd), NULL, 0, + STK_CMD_TIMEOUT_MS, true)) { + if (attempt > 0) { + ESP_LOGI(TAG, "get_sync OK after %d retries", attempt); + } else { + ESP_LOGI(TAG, "get_sync OK"); + } + return true; + } + /* Drain any stray bytes before retrying. */ + uint8_t drain[16]; + usb_host_read_cdc(drain, sizeof(drain), 10); + vTaskDelay(pdMS_TO_TICKS(20)); + } + ESP_LOGE(TAG, "get_sync failed after %d attempts", STK_SYNC_RETRIES); + return false; +} + +static bool cmd_get_signature(uint8_t sig[3]) +{ + uint8_t cmd[] = { STK_READ_SIGN, STK_CRC_EOP }; + uint8_t resp[3] = {0}; + + if (!send_and_expect(cmd, sizeof(cmd), resp, sizeof(resp), + STK_CMD_TIMEOUT_MS, true)) { + return false; + } + sig[0] = resp[0]; + sig[1] = resp[1]; + sig[2] = resp[2]; + ESP_LOGI(TAG, "signature: %02X %02X %02X", sig[0], sig[1], sig[2]); + return true; +} + +static bool cmd_enter_progmode(void) +{ + uint8_t cmd[] = { STK_ENTER_PROGMODE, STK_CRC_EOP }; + return send_and_expect(cmd, sizeof(cmd), NULL, 0, + STK_CMD_TIMEOUT_MS, true); +} + +static bool cmd_load_address(uint16_t word_addr) +{ + uint8_t cmd[] = { + STK_LOAD_ADDRESS, + (uint8_t)(word_addr & 0xFF), + (uint8_t)((word_addr >> 8) & 0xFF), + STK_CRC_EOP + }; + return send_and_expect(cmd, sizeof(cmd), NULL, 0, + STK_CMD_TIMEOUT_MS, true); +} + +static bool cmd_prog_page(const uint8_t *data, uint16_t len) +{ + /* Header: 0x64, len_hi, len_lo, memtype 'F'(0x46). Then data, then EOP. */ + uint8_t header[4] = { + STK_PROG_PAGE, + (uint8_t)((len >> 8) & 0xFF), + (uint8_t)(len & 0xFF), + 0x46 /* 'F' = flash */ + }; + + /* Send header + data + EOP as one logical transfer. CherryUSB write is + * a single URB, so we build a contiguous buffer. */ + static uint8_t pkt[4 + ATMEGA328P_PAGE_SIZE + 1]; + if (len > ATMEGA328P_PAGE_SIZE) { + ESP_LOGE(TAG, "prog_page len %d exceeds page %d", len, ATMEGA328P_PAGE_SIZE); + return false; + } + memcpy(pkt, header, 4); + memcpy(pkt + 4, data, len); + pkt[4 + len] = STK_CRC_EOP; + + return send_and_expect(pkt, 4 + len + 1, NULL, 0, + STK_PAGE_TIMEOUT_MS, true); +} + +static bool cmd_leave_progmode(void) +{ + uint8_t cmd[] = { STK_LEAVE_PROGMODE, STK_CRC_EOP }; + /* optiboot shortens WDT and resets; STK_OK may be absent. Lenient. */ + bool ok = send_and_expect(cmd, sizeof(cmd), NULL, 0, + STK_LEAVE_TIMEOUT_MS, false); + if (!ok) { + ESP_LOGW(TAG, "leave_progmode did not reply (expected on optiboot)"); + /* Treat as success — optiboot intentionally resets. */ + ok = true; + } + return ok; +} + +bool stk500v1_flash_buffer(const uint8_t *buffer, size_t size, uint16_t page_size) +{ + if (!buffer || size == 0) { + ESP_LOGE(TAG, "flash_buffer: null/empty buffer"); + return false; + } + if (page_size == 0) { + ESP_LOGE(TAG, "flash_buffer: page_size=0"); + return false; + } + if (size > ATMEGA328P_FLASH_SIZE) { + ESP_LOGE(TAG, "flash_buffer: size %d exceeds flash %d", + (int)size, ATMEGA328P_FLASH_SIZE); + return false; + } + if (page_size != ATMEGA328P_PAGE_SIZE) { + ESP_LOGW(TAG, "page_size %d != expected %d — using provided", + page_size, ATMEGA328P_PAGE_SIZE); + } + + ESP_LOGI(TAG, "Starting flash: %d bytes, page %d", (int)size, page_size); + + /* 1. Auto-reset Arduino to (re)enter optiboot. */ + usb_host_reset_arduino(); + + /* 2. Get sync (retry within optiboot ~1s window). */ + if (!cmd_get_sync()) { + return false; + } + + /* 3. Read & validate signature. */ + uint8_t sig[3] = {0}; + if (!cmd_get_signature(sig)) { + return false; + } + if (sig[0] != ATMEGA328P_SIG_0 || sig[1] != ATMEGA328P_SIG_1 || + sig[2] != ATMEGA328P_SIG_2) { + ESP_LOGE(TAG, "signature mismatch: got %02X %02X %02X, want %02X %02X %02X", + sig[0], sig[1], sig[2], + ATMEGA328P_SIG_0, ATMEGA328P_SIG_1, ATMEGA328P_SIG_2); + return false; + } + + /* 4. Enter programming mode. */ + if (!cmd_enter_progmode()) { + ESP_LOGE(TAG, "enter_progmode failed"); + return false; + } + ESP_LOGI(TAG, "entered programming mode"); + + /* 5. Program pages. ATmega328P uses word addresses (byte/2). */ + uint16_t pages = (uint16_t)((size + page_size - 1) / page_size); + for (uint16_t page = 0; page < pages; page++) { + uint16_t byte_addr = (uint16_t)(page * page_size); + uint16_t word_addr = byte_addr / 2; + uint16_t remaining = (uint16_t)(size - byte_addr); + uint16_t this_len = (remaining > page_size) ? page_size : remaining; + + if (!cmd_load_address(word_addr)) { + ESP_LOGE(TAG, "load_address failed at page %d (word 0x%04X)", + page + 1, word_addr); + cmd_leave_progmode(); + return false; + } + if (!cmd_prog_page(buffer + byte_addr, this_len)) { + ESP_LOGE(TAG, "prog_page failed at page %d/%d (byte 0x%04X, %d bytes)", + page + 1, pages, byte_addr, this_len); + cmd_leave_progmode(); + return false; + } + + if ((page + 1) % 16 == 0 || page + 1 == pages) { + ESP_LOGI(TAG, "flashing page %d/%d", page + 1, pages); + } + /* Yield to keep BLE host stack alive. */ + vTaskDelay(pdMS_TO_TICKS(1)); + } + + /* 6. Leave programming mode. */ + cmd_leave_progmode(); + + ESP_LOGI(TAG, "Flash complete: %d pages written", pages); + return true; +} diff --git a/velxio-deployer-firmware/main/stk500v1.h b/velxio-deployer-firmware/main/stk500v1.h new file mode 100644 index 0000000..98d1ee7 --- /dev/null +++ b/velxio-deployer-firmware/main/stk500v1.h @@ -0,0 +1,70 @@ +/** + * @file stk500v1.h + * @brief STK500v1 protocol implementation for flashing ATmega328P via optiboot. + * + * Communicates with Arduino's optiboot bootloader over USB CDC using the + * STK500v1 command set (verified against avrdude stk500.c + optiboot.c): + * - get_sync (0x30 0x20) -> 0x14 0x10 + * - get_signature (0x75 0x20) -> 0x14 1E 95 0F 0x10 + * - enter_progmode (0x50 0x20) -> 0x14 0x10 + * - load_address (0x55 lo hi 0x20) -> 0x14 0x10 (word address, LE) + * - prog_page (0x64 len_hi len_lo 'F' data[] 0x20) -> 0x14 0x10 + * - leave_progmode (0x51 0x20) -> 0x14 (optiboot WDT-resets, OK optional) + * + * Every command is terminated with CRC_EOP=0x20. optiboot replies with + * STK_INSYNC=0x14 immediately, then payload, then STK_OK=0x10. + */ + +#pragma once + +#include +#include + +/* STK500v1 command bytes (from Atmel AVR061 command.h, matches optiboot) */ +#define STK_CRC_EOP 0x20 /* End-of-packet sentinel */ +#define STK_GET_SYNC 0x30 /* Echos sync, establishes comms */ +#define STK_ENTER_PROGMODE 0x50 /* Enter programming mode */ +#define STK_LEAVE_PROGMODE 0x51 /* Leave programming mode */ +#define STK_LOAD_ADDRESS 0x55 /* Load address (word addr, LE) */ +#define STK_PROG_PAGE 0x64 /* Program flash page */ +#define STK_READ_PAGE 0x74 /* Read flash page (verify) */ +#define STK_READ_SIGN 0x75 /* Read device signature bytes */ + +/* STK500v1 response bytes */ +#define STK_INSYNC 0x14 /* Command accepted */ +#define STK_OK 0x10 /* Command completed */ +#define STK_NOSYNC 0x15 /* Lost sync */ + +/* ATmega328P device constants */ +#define ATMEGA328P_SIG_0 0x1E +#define ATMEGA328P_SIG_1 0x95 +#define ATMEGA328P_SIG_2 0x0F +#define ATMEGA328P_FLASH_SIZE 32768 /* bytes */ +#define ATMEGA328P_PAGE_SIZE 128 /* bytes */ + +/* Timing / retries */ +#define STK_SYNC_RETRIES 10 /* get_sync attempts (optiboot window ~1s) */ +#define STK_CMD_TIMEOUT_MS 200 /* per-command response timeout */ +#define STK_PAGE_TIMEOUT_MS 500 /* prog_page timeout (page write ~4ms) */ +#define STK_LEAVE_TIMEOUT_MS 100 /* leave_progmode (OK may be absent) */ + +/** + * @brief Initialise the STK500v1 layer (no USB work — just logging). + * @return true always + */ +bool stk500v1_init(void); + +/** + * @brief Program a raw binary image into ATmega328P flash via optiboot STK500v1. + * + * Performs: auto-reset (DTR pulse) -> get_sync -> get_signature -> enter_progmode + * -> loop (load_address + prog_page) -> leave_progmode. + * Blocks the calling task for the full flash duration (~8s for 32KB). + * The caller MUST have claimed USB RX first (usb_host_rx_claim()). + * + * @param buffer Raw binary flash image (must be <= 32768 bytes) + * @param size Size in bytes + * @param page_size Page size (typically 128 for ATmega328P) + * @return true if all pages written & signature verified + */ +bool stk500v1_flash_buffer(const uint8_t *buffer, size_t size, uint16_t page_size); diff --git a/velxio-deployer-firmware/main/usb_host.c b/velxio-deployer-firmware/main/usb_host.c new file mode 100644 index 0000000..c666435 --- /dev/null +++ b/velxio-deployer-firmware/main/usb_host.c @@ -0,0 +1,218 @@ +#include +#include "esp_log.h" +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" +#include "usbh_core.h" +#include "usbh_serial.h" +#include "usb_host.h" + +static const char *TAG = "USB_HOST"; + +static usb_data_cb_t serial_callback = NULL; +static bool arduino_connected_flag = false; +static bool initialized = false; +static bool rx_claimed = false; +static struct usbh_serial *serial_dev = NULL; +static TaskHandle_t usb_monitor_task_handle = NULL; +static TaskHandle_t usb_rx_task_handle = NULL; + +/* Default termios (serial bridge): blocking RX, 115200 8N1. */ +static struct usbh_serial_termios make_termios(uint32_t rx_timeout) +{ + struct usbh_serial_termios t = { + .baudrate = 115200, + .databits = 8, + .parity = 0, + .stopbits = 0, + .rtscts = false, + .rx_timeout = rx_timeout, + }; + return t; +} + +static void usb_rx_task(void *arg) +{ + uint8_t buf[512]; + int ret; + + while (1) { + /* If suspended by rx_claim, just idle (suspension handled by VTaskSuspend). */ + if (serial_dev && arduino_connected_flag && !rx_claimed) { + ret = usbh_serial_read(serial_dev, buf, sizeof(buf)); + if (ret > 0) { + if (serial_callback) { + serial_callback(buf, ret); + } + } + } + vTaskDelay(1); + } +} + +static void usb_monitor_task(void *arg) +{ + struct usbh_serial *dev; + + while (1) { + if (!arduino_connected_flag) { + dev = usbh_serial_open("/dev/ttyACM0", USBH_SERIAL_O_RDWR); + if (!dev) { + dev = usbh_serial_open("/dev/ttyUSB0", USBH_SERIAL_O_RDWR); + } + if (dev) { + serial_dev = dev; + arduino_connected_flag = true; + + struct usbh_serial_termios t = make_termios(0); + usbh_serial_control(dev, USBH_SERIAL_CMD_SET_ATTR, &t); + /* SET_ATTR already drives DTR|RTS high internally (see + * usbh_serial.c SET_ATTR handler). Do NOT issue TIOCMSET + * with value-as-pointer — that derefs an invalid address. */ + + ESP_LOGI(TAG, "Arduino connected via CherryUSB"); + } + } else { + int ret = usbh_serial_write(serial_dev, NULL, 0); + if (ret < 0) { + ESP_LOGI(TAG, "Arduino disconnected"); + arduino_connected_flag = false; + usbh_serial_close(serial_dev); + serial_dev = NULL; + } + } + vTaskDelay(pdMS_TO_TICKS(1000)); + } +} + +bool usb_host_init(void) +{ + if (initialized) return true; + + esp_err_t ret = usbh_initialize(0, ESP_USB_FS0_BASE, NULL); + if (ret != 0) { + ESP_LOGE(TAG, "CherryUSB init failed: %d", ret); + return false; + } + + xTaskCreate(usb_monitor_task, "usb_mon", 4096, NULL, 3, &usb_monitor_task_handle); + xTaskCreate(usb_rx_task, "usb_rx", 2560, NULL, 4, &usb_rx_task_handle); + + initialized = true; + ESP_LOGI(TAG, "USB Host initialized (CherryUSB)"); + return true; +} + +bool usb_host_arduino_connected(void) +{ + return arduino_connected_flag && serial_dev != NULL; +} + +bool usb_host_write_cdc(const uint8_t *data, size_t len) +{ + if (!serial_dev) return false; + + int ret = usbh_serial_write(serial_dev, data, len); + if (ret < 0) { + ESP_LOGE(TAG, "Serial write failed: %d", ret); + return false; + } + return true; +} + +int usb_host_read_cdc(uint8_t *buf, size_t len, uint32_t timeout_ms) +{ + if (!serial_dev || !arduino_connected_flag) { + return -1; + } + /* CherryUSB uses serial_dev->rx_timeout_ms for the sem_take timeout + * (see usbh_serial.c:461). Setting it inline is the documented field. */ + serial_dev->rx_timeout_ms = timeout_ms; + int ret = usbh_serial_read(serial_dev, buf, len); + return ret; /* >=0 bytes, <0 on error/timeout */ +} + +void usb_host_set_serial_callback(usb_data_cb_t cb) +{ + serial_callback = cb; +} + +void usb_host_rx_claim(void) +{ + if (!initialized || rx_claimed) return; + + /* Stop the rx/monitor tasks so they don't drain the CDC ringbuffer. */ + if (usb_rx_task_handle) vTaskSuspend(usb_rx_task_handle); + if (usb_monitor_task_handle) vTaskSuspend(usb_monitor_task_handle); + + if (serial_dev) { + /* Reconfigure with bounded rx_timeout so usb_host_read_cdc returns + * on timeout. SET_ATTR also kills+resubmits the IN URB and resets + * the ringbuffer, clearing any stale serial data. */ + struct usbh_serial_termios t = make_termios(50); + usbh_serial_control(serial_dev, USBH_SERIAL_CMD_SET_ATTR, &t); + } + rx_claimed = true; + ESP_LOGI(TAG, "RX claimed for STK500"); +} + +void usb_host_rx_release(void) +{ + if (!initialized || !rx_claimed) return; + + if (serial_dev) { + /* Restore blocking RX (rx_timeout=0 = forever) for serial bridge. */ + struct usbh_serial_termios t = make_termios(0); + usbh_serial_control(serial_dev, USBH_SERIAL_CMD_SET_ATTR, &t); + } + rx_claimed = false; + + if (usb_rx_task_handle) vTaskResume(usb_rx_task_handle); + if (usb_monitor_task_handle) vTaskResume(usb_monitor_task_handle); + ESP_LOGI(TAG, "RX released back to serial bridge"); +} + +void usb_host_reset_arduino(void) +{ + if (!serial_dev || !arduino_connected_flag) { + ESP_LOGW(TAG, "reset_arduino: no device — skipping DTR pulse"); + return; + } + + /* Drive DTR+RTS low to assert RESET (Arduino autoreset circuit). + * TIOCMSET expects a pointer to uint32_t flags — NEVER pass flags + * cast directly as the pointer (that was bug B10, a NULL+small deref). */ + uint32_t flags_low = 0; + usbh_serial_control(serial_dev, USBH_SERIAL_CMD_TIOCMSET, &flags_low); + vTaskDelay(pdMS_TO_TICKS(1)); + + uint32_t flags_high = USBH_SERIAL_TIOCM_DTR | USBH_SERIAL_TIOCM_RTS; + usbh_serial_control(serial_dev, USBH_SERIAL_CMD_TIOCMSET, &flags_high); + vTaskDelay(pdMS_TO_TICKS(50)); + + ESP_LOGI(TAG, "Arduino DTR pulse sent (autoreset)"); +} + +void usb_host_deinit(void) +{ + if (!initialized) return; + + initialized = false; + arduino_connected_flag = false; + rx_claimed = false; + + if (usb_monitor_task_handle) { + vTaskDelete(usb_monitor_task_handle); + usb_monitor_task_handle = NULL; + } + if (usb_rx_task_handle) { + vTaskDelete(usb_rx_task_handle); + usb_rx_task_handle = NULL; + } + if (serial_dev) { + usbh_serial_close(serial_dev); + serial_dev = NULL; + } + usbh_deinitialize(0); + + ESP_LOGI(TAG, "USB Host deinitialized"); +} diff --git a/velxio-deployer-firmware/main/usb_host.h b/velxio-deployer-firmware/main/usb_host.h new file mode 100644 index 0000000..a8606aa --- /dev/null +++ b/velxio-deployer-firmware/main/usb_host.h @@ -0,0 +1,89 @@ +/** + * @file usb_host.h + * @brief USB Host CDC driver using CherryUSB. + * + * Manages enumeration of Arduino Uno/Nano as a CDC serial device, + * providing read/write access for STK500v1 flashing and serial bridge. + * + * RX routing: by default the rx_task feeds the serial-bridge callback. + * During flashing, usb_host_rx_claim() suspends the rx/monitor tasks so + * STK500v1 can read CDC responses exclusively via usb_host_read_cdc(). + */ + +#pragma once + +#include +#include + +/** + * @brief Callback invoked when data is received from Arduino via USB CDC + * while RX is NOT claimed (serial bridge mode). + * @param data Received bytes + * @param len Number of bytes + */ +typedef void (*usb_data_cb_t)(uint8_t *data, size_t len); + +/** + * @brief Initialise CherryUSB Host driver and start monitor/rx tasks. + * @return true on success + */ +bool usb_host_init(void); + +/** + * @brief Check if an Arduino CDC device is currently enumerated. + * @return true if connected + */ +bool usb_host_arduino_connected(void); + +/** + * @brief Write data to the Arduino via USB CDC (blocking until TX done). + * @return true if write succeeded + */ +bool usb_host_write_cdc(const uint8_t *data, size_t len); + +/** + * @brief Read up to len bytes from Arduino CDC within timeout. + * + * Only valid while RX is claimed (i.e. during flashing). Reads from the + * CherryUSB ringbuffer; blocks up to timeout_ms waiting for data. + * + * @param buf Destination buffer + * @param len Max bytes to read + * @param timeout_ms Max wait time + * @return number of bytes read (>=0), or negative on error/timeout + */ +int usb_host_read_cdc(uint8_t *buf, size_t len, uint32_t timeout_ms); + +/** + * @brief Register callback for incoming CDC serial data (serial bridge). + */ +void usb_host_set_serial_callback(usb_data_cb_t cb); + +/** + * @brief Claim USB CDC RX for STK500v1 flashing. + * + * Suspends the rx_task and monitor_task so STK500v1 can exclusively read + * responses via usb_host_read_cdc(). Reconfigures the CDC port with a + * bounded rx_timeout so reads actually return on timeout. + */ +void usb_host_rx_claim(void); + +/** + * @brief Release USB CDC RX back to serial bridge mode. + * + * Resumes rx_task and monitor_task and restores rx_timeout=0 (blocking). + */ +void usb_host_rx_release(void); + +/** + * @brief Pulse DTR low then high to reset Arduino into optiboot. + * + * Mirrors avrdude's Arduino autoreset: DTR/RTS low ~1ms, then high, + * wait 50ms for optiboot to enter. Idempotent if no device present. + */ +void usb_host_reset_arduino(void); + +/** + * @brief Deinitialise USB Host and release resources. + */ +void usb_host_deinit(void); diff --git a/velxio-deployer-firmware/partitions.csv b/velxio-deployer-firmware/partitions.csv new file mode 100644 index 0000000..b673876 --- /dev/null +++ b/velxio-deployer-firmware/partitions.csv @@ -0,0 +1,6 @@ +# Name, Type, SubType, Offset, Size +nvs, data, nvs, 0x9000, 0x6000 +otadata, data, ota, 0xf000, 0x2000 +ota_0, app, ota_0, 0x20000, 0x300000 +ota_1, app, ota_1, 0x320000,0x300000 +storage, data, spiffs, 0x620000,0x9E0000 diff --git a/velxio-deployer-firmware/sdkconfig b/velxio-deployer-firmware/sdkconfig new file mode 100644 index 0000000..8c3d6a6 --- /dev/null +++ b/velxio-deployer-firmware/sdkconfig @@ -0,0 +1,4584 @@ +# +# Automatically generated file. DO NOT EDIT. +# Espressif IoT Development Framework (ESP-IDF) 6.0.1 Project Configuration +# +# default: +CONFIG_SOC_ADC_SUPPORTED=y +# default: +CONFIG_SOC_UART_SUPPORTED=y +# default: +CONFIG_SOC_PCNT_SUPPORTED=y +# default: +CONFIG_SOC_PHY_SUPPORTED=y +# default: +CONFIG_SOC_WIFI_SUPPORTED=y +# default: +CONFIG_SOC_TWAI_SUPPORTED=y +# default: +CONFIG_SOC_GDMA_SUPPORTED=y +# default: +CONFIG_SOC_UHCI_SUPPORTED=y +# default: +CONFIG_SOC_AHB_GDMA_SUPPORTED=y +# default: +CONFIG_SOC_GPTIMER_SUPPORTED=y +# default: +CONFIG_SOC_LCDCAM_CAM_SUPPORTED=y +# default: +CONFIG_SOC_LCDCAM_I80_LCD_SUPPORTED=y +# default: +CONFIG_SOC_LCDCAM_RGB_LCD_SUPPORTED=y +# default: +CONFIG_SOC_LCD_I80_SUPPORTED=y +# default: +CONFIG_SOC_LCD_RGB_SUPPORTED=y +# default: +CONFIG_SOC_MCPWM_SUPPORTED=y +# default: +CONFIG_SOC_DEDICATED_GPIO_SUPPORTED=y +# default: +CONFIG_SOC_CACHE_SUPPORT_WRAP=y +# default: +CONFIG_SOC_ULP_SUPPORTED=y +# default: +CONFIG_SOC_ULP_FSM_SUPPORTED=y +# default: +CONFIG_SOC_RISCV_COPROC_SUPPORTED=y +# default: +CONFIG_SOC_BT_SUPPORTED=y +# default: +CONFIG_SOC_USB_OTG_SUPPORTED=y +# default: +CONFIG_SOC_USB_SERIAL_JTAG_SUPPORTED=y +# default: +CONFIG_SOC_CCOMP_TIMER_SUPPORTED=y +# default: +CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED=y +# default: +CONFIG_SOC_SUPPORTS_SECURE_DL_MODE=y +# default: +CONFIG_SOC_EFUSE_KEY_PURPOSE_FIELD=y +# default: +CONFIG_SOC_EFUSE_SUPPORTED=y +# default: +CONFIG_SOC_SDMMC_HOST_SUPPORTED=y +# default: +CONFIG_SOC_RTC_FAST_MEM_SUPPORTED=y +# default: +CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED=y +# default: +CONFIG_SOC_RTC_MEM_SUPPORTED=y +# default: +CONFIG_SOC_RTC_TIMER_V1_SUPPORTED=y +# default: +CONFIG_SOC_PSRAM_DMA_CAPABLE=y +# default: +CONFIG_SOC_XT_WDT_SUPPORTED=y +# default: +CONFIG_SOC_I2S_SUPPORTED=y +# default: +CONFIG_SOC_RMT_SUPPORTED=y +# default: +CONFIG_SOC_SDM_SUPPORTED=y +# default: +CONFIG_SOC_GPSPI_SUPPORTED=y +# default: +CONFIG_SOC_LEDC_SUPPORTED=y +# default: +CONFIG_SOC_I2C_SUPPORTED=y +# default: +CONFIG_SOC_SYSTIMER_SUPPORTED=y +# default: +CONFIG_SOC_SUPPORT_COEXISTENCE=y +# default: +CONFIG_SOC_TEMP_SENSOR_SUPPORTED=y +# default: +CONFIG_SOC_AES_SUPPORTED=y +# default: +CONFIG_SOC_MPI_SUPPORTED=y +# default: +CONFIG_SOC_SHA_SUPPORTED=y +# default: +CONFIG_SOC_HMAC_SUPPORTED=y +# default: +CONFIG_SOC_DIG_SIGN_SUPPORTED=y +# default: +CONFIG_SOC_FLASH_ENC_SUPPORTED=y +# default: +CONFIG_SOC_SECURE_BOOT_SUPPORTED=y +# default: +CONFIG_SOC_MEMPROT_SUPPORTED=y +# default: +CONFIG_SOC_TOUCH_SENSOR_SUPPORTED=y +# default: +CONFIG_SOC_BOD_SUPPORTED=y +# default: +CONFIG_SOC_CLK_TREE_SUPPORTED=y +# default: +CONFIG_SOC_MPU_SUPPORTED=y +# default: +CONFIG_SOC_WDT_SUPPORTED=y +# default: +CONFIG_SOC_SPI_FLASH_SUPPORTED=y +# default: +CONFIG_SOC_RNG_SUPPORTED=y +# default: +CONFIG_SOC_LIGHT_SLEEP_SUPPORTED=y +# default: +CONFIG_SOC_DEEP_SLEEP_SUPPORTED=y +# default: +CONFIG_SOC_LP_PERIPH_SHARE_INTERRUPT=y +# default: +CONFIG_SOC_PM_SUPPORTED=y +# default: +CONFIG_SOC_SIMD_INSTRUCTION_SUPPORTED=y +# default: +CONFIG_SOC_XTAL_SUPPORT_40M=y +# default: +CONFIG_SOC_APPCPU_HAS_CLOCK_GATING_BUG=y +# default: +CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED=y +# default: +CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED=y +# default: +CONFIG_SOC_ADC_ARBITER_SUPPORTED=y +# default: +CONFIG_SOC_ADC_DIG_IIR_FILTER_SUPPORTED=y +# default: +CONFIG_SOC_ADC_MONITOR_SUPPORTED=y +# default: +CONFIG_SOC_ADC_DMA_SUPPORTED=y +# default: +CONFIG_SOC_ADC_PERIPH_NUM=2 +# default: +CONFIG_SOC_ADC_MAX_CHANNEL_NUM=10 +# default: +CONFIG_SOC_ADC_ATTEN_NUM=4 +# default: +CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM=2 +# default: +CONFIG_SOC_ADC_PATT_LEN_MAX=24 +# default: +CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH=12 +# default: +CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH=12 +# default: +CONFIG_SOC_ADC_DIGI_RESULT_BYTES=4 +# default: +CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV=4 +# default: +CONFIG_SOC_ADC_DIGI_IIR_FILTER_NUM=2 +# default: +CONFIG_SOC_ADC_DIGI_MONITOR_NUM=2 +# default: +CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH=83333 +# default: +CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW=611 +# default: +CONFIG_SOC_ADC_RTC_MIN_BITWIDTH=12 +# default: +CONFIG_SOC_ADC_RTC_MAX_BITWIDTH=12 +# default: +CONFIG_SOC_ADC_CALIBRATION_V1_SUPPORTED=y +# default: +CONFIG_SOC_ADC_SELF_HW_CALI_SUPPORTED=y +# default: +CONFIG_SOC_ADC_SHARED_POWER=y +# default: +CONFIG_SOC_APB_BACKUP_DMA=y +# default: +CONFIG_SOC_BROWNOUT_RESET_SUPPORTED=y +# default: +CONFIG_SOC_CACHE_WRITEBACK_SUPPORTED=y +# default: +CONFIG_SOC_CACHE_FREEZE_SUPPORTED=y +# default: +CONFIG_SOC_CACHE_ACS_INVALID_STATE_ON_PANIC=y +# default: +CONFIG_SOC_CPU_CORES_NUM=2 +# default: +CONFIG_SOC_CPU_INTR_NUM=32 +# default: +CONFIG_SOC_CPU_HAS_FPU=y +# default: +CONFIG_SOC_HP_CPU_HAS_MULTIPLE_CORES=y +# default: +CONFIG_SOC_CPU_BREAKPOINTS_NUM=2 +# default: +CONFIG_SOC_CPU_WATCHPOINTS_NUM=2 +# default: +CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE=0x40 +# default: +CONFIG_SOC_SIMD_PREFERRED_DATA_ALIGNMENT=16 +# default: +CONFIG_SOC_DS_SIGNATURE_MAX_BIT_LEN=4096 +# default: +CONFIG_SOC_DS_KEY_PARAM_MD_IV_LENGTH=16 +# default: +CONFIG_SOC_DS_KEY_CHECK_MAX_WAIT_US=1100 +# default: +CONFIG_SOC_AHB_GDMA_VERSION=1 +# default: +CONFIG_SOC_GPIO_PORT=1 +# default: +CONFIG_SOC_GPIO_PIN_COUNT=49 +# default: +CONFIG_SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER=y +# default: +CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD=y +# default: +CONFIG_SOC_GPIO_VALID_GPIO_MASK=0x1FFFFFFFFFFFF +# default: +CONFIG_SOC_GPIO_IN_RANGE_MAX=48 +# default: +CONFIG_SOC_GPIO_OUT_RANGE_MAX=48 +# default: +CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK=0x0001FFFFFC000000 +# default: +CONFIG_SOC_GPIO_CLOCKOUT_BY_IO_MUX=y +# default: +CONFIG_SOC_GPIO_CLOCKOUT_CHANNEL_NUM=3 +# default: +CONFIG_SOC_I2C_NUM=2 +# default: +CONFIG_SOC_HP_I2C_NUM=2 +# default: +CONFIG_SOC_I2C_SUPPORT_XTAL=y +# default: +CONFIG_SOC_I2C_SUPPORT_RTC=y +# default: +CONFIG_SOC_I2C_SUPPORT_10BIT_ADDR=y +# default: +CONFIG_SOC_I2C_SUPPORT_SLAVE=y +# default: +CONFIG_SOC_I2C_SLAVE_SUPPORT_BROADCAST=y +# default: +CONFIG_SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE=y +# default: +CONFIG_SOC_I2S_HW_VERSION_2=y +# default: +CONFIG_SOC_I2S_SUPPORTS_PCM=y +# default: +CONFIG_SOC_I2S_SUPPORTS_PDM=y +# default: +CONFIG_SOC_I2S_SUPPORTS_PDM_TX=y +# default: +CONFIG_SOC_I2S_SUPPORTS_PCM2PDM=y +# default: +CONFIG_SOC_I2S_SUPPORTS_PDM_RX=y +# default: +CONFIG_SOC_I2S_SUPPORTS_PDM2PCM=y +# default: +CONFIG_SOC_I2S_PDM_MAX_TX_LINES=2 +# default: +CONFIG_SOC_I2S_PDM_MAX_RX_LINES=4 +# default: +CONFIG_SOC_I2S_SUPPORTS_TDM=y +# default: +CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK=y +# default: +CONFIG_SOC_LEDC_SUPPORT_XTAL_CLOCK=y +# default: +CONFIG_SOC_LEDC_TIMER_NUM=4 +# default: +CONFIG_SOC_LEDC_CHANNEL_NUM=8 +# default: +CONFIG_SOC_LEDC_TIMER_BIT_WIDTH=14 +# default: +CONFIG_SOC_LEDC_SUPPORT_FADE_STOP=y +# default: +CONFIG_SOC_MCPWM_SWSYNC_CAN_PROPAGATE=y +# default: +CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM=1 +# default: +CONFIG_SOC_MMU_PERIPH_NUM=1 +# default: +CONFIG_SOC_MPU_MIN_REGION_SIZE=0x20000000 +# default: +CONFIG_SOC_MPU_REGIONS_MAX_NUM=8 +# default: +CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=48 +# default: +CONFIG_SOC_RMT_SUPPORT_RX_PINGPONG=y +# default: +CONFIG_SOC_RMT_SUPPORT_TX_LOOP_COUNT=y +# default: +CONFIG_SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP=y +# default: +CONFIG_SOC_RMT_SUPPORT_DMA=y +# default: +CONFIG_SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH=128 +# default: +CONFIG_SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM=549 +# default: +CONFIG_SOC_RTC_CNTL_TAGMEM_PD_DMA_BUS_WIDTH=128 +# default: +CONFIG_SOC_RTC_CNTL_NEEDS_ATOMIC_ACCESS=y +# default: +CONFIG_SOC_RTCIO_PIN_COUNT=22 +# default: +CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED=y +# default: +CONFIG_SOC_RTCIO_HOLD_SUPPORTED=y +# default: +CONFIG_SOC_RTCIO_WAKE_SUPPORTED=y +# default: +CONFIG_SOC_LP_IO_CLOCK_IS_INDEPENDENT=y +# default: +CONFIG_SOC_SPI_PERIPH_NUM=3 +# default: +CONFIG_SOC_SPI_MAX_CS_NUM=6 +# default: +CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE=64 +# default: +CONFIG_SOC_SPI_SUPPORT_DDRCLK=y +# default: +CONFIG_SOC_SPI_SLAVE_SUPPORT_SEG_TRANS=y +# default: +CONFIG_SOC_SPI_SUPPORT_CD_SIG=y +# default: +CONFIG_SOC_SPI_SUPPORT_CONTINUOUS_TRANS=y +# default: +CONFIG_SOC_SPI_SUPPORT_SLAVE_HD_VER2=y +# default: +CONFIG_SOC_SPI_SUPPORT_CLK_APB=y +# default: +CONFIG_SOC_SPI_SUPPORT_CLK_XTAL=y +# default: +CONFIG_SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT=y +# default: +CONFIG_SOC_MEMSPI_IS_INDEPENDENT=y +# default: +CONFIG_SOC_SPI_MAX_PRE_DIVIDER=16 +# default: +CONFIG_SOC_SPI_SUPPORT_OCT=y +# default: +CONFIG_SOC_SPI_SCT_SUPPORTED=y +# default: +CONFIG_SOC_SPI_SCT_REG_NUM=14 +# default: +CONFIG_SOC_SPI_SCT_BUFFER_NUM_MAX=y +# default: +CONFIG_SOC_SPI_SCT_CONF_BITLEN_MAX=0x3FFFA +# default: +CONFIG_SOC_SPIRAM_SUPPORTED=y +# default: +CONFIG_SOC_SPIRAM_XIP_SUPPORTED=y +# default: +CONFIG_SOC_SYSTIMER_COUNTER_NUM=2 +# default: +CONFIG_SOC_SYSTIMER_ALARM_NUM=3 +# default: +CONFIG_SOC_SYSTIMER_BIT_WIDTH_LO=32 +# default: +CONFIG_SOC_SYSTIMER_BIT_WIDTH_HI=20 +# default: +CONFIG_SOC_SYSTIMER_FIXED_DIVIDER=y +# default: +CONFIG_SOC_SYSTIMER_INT_LEVEL=y +# default: +CONFIG_SOC_SYSTIMER_ALARM_MISS_COMPENSATE=y +# default: +CONFIG_SOC_LP_TIMER_BIT_WIDTH_LO=32 +# default: +CONFIG_SOC_LP_TIMER_BIT_WIDTH_HI=16 +# default: +CONFIG_SOC_TOUCH_SENSOR_VERSION=2 +# default: +CONFIG_SOC_TOUCH_MIN_CHAN_ID=1 +# default: +CONFIG_SOC_TOUCH_MAX_CHAN_ID=14 +# default: +CONFIG_SOC_TOUCH_SUPPORT_BENCHMARK=y +# default: +CONFIG_SOC_TOUCH_SUPPORT_SLEEP_WAKEUP=y +# default: +CONFIG_SOC_TOUCH_SUPPORT_WATERPROOF=y +# default: +CONFIG_SOC_TOUCH_SUPPORT_PROX_SENSING=y +# default: +CONFIG_SOC_TOUCH_SUPPORT_DENOISE_CHAN=y +# default: +CONFIG_SOC_TOUCH_PROXIMITY_CHANNEL_NUM=3 +# default: +CONFIG_SOC_TOUCH_SAMPLE_CFG_NUM=1 +# default: +CONFIG_SOC_TWAI_CONTROLLER_NUM=1 +# default: +CONFIG_SOC_TWAI_MASK_FILTER_NUM=1 +# default: +CONFIG_SOC_UART_NUM=3 +# default: +CONFIG_SOC_UART_HP_NUM=3 +# default: +CONFIG_SOC_UART_FIFO_LEN=128 +# default: +CONFIG_SOC_UART_BITRATE_MAX=5000000 +# default: +CONFIG_SOC_UART_SUPPORT_WAKEUP_INT=y +# default: +CONFIG_SOC_UART_SUPPORT_APB_CLK=y +# default: +CONFIG_SOC_UART_SUPPORT_RTC_CLK=y +# default: +CONFIG_SOC_UART_SUPPORT_XTAL_CLK=y +# default: +CONFIG_SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE=y +# default: +CONFIG_SOC_UHCI_NUM=1 +# default: +CONFIG_SOC_USB_OTG_PERIPH_NUM=1 +# default: +CONFIG_SOC_USB_FSLS_PHY_NUM=1 +# default: +CONFIG_SOC_SHA_DMA_MAX_BUFFER_SIZE=3968 +# default: +CONFIG_SOC_SHA_SUPPORT_DMA=y +# default: +CONFIG_SOC_SHA_SUPPORT_RESUME=y +# default: +CONFIG_SOC_SHA_GDMA=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA1=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA224=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA256=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA384=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA512=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA512_224=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA512_256=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA512_T=y +# default: +CONFIG_SOC_MPI_MEM_BLOCKS_NUM=4 +# default: +CONFIG_SOC_MPI_OPERATIONS_NUM=3 +# default: +CONFIG_SOC_RSA_MAX_BIT_LEN=4096 +# default: +CONFIG_SOC_AES_SUPPORT_DMA=y +# default: +CONFIG_SOC_AES_GDMA=y +# default: +CONFIG_SOC_AES_SUPPORT_AES_128=y +# default: +CONFIG_SOC_AES_SUPPORT_AES_256=y +# default: +CONFIG_SOC_PM_SUPPORT_EXT0_WAKEUP=y +# default: +CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP=y +# default: +CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP=y +# default: +CONFIG_SOC_PM_SUPPORT_WIFI_WAKEUP=y +# default: +CONFIG_SOC_PM_SUPPORT_BT_WAKEUP=y +# default: +CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP=y +# default: +CONFIG_SOC_PM_SUPPORT_CPU_PD=y +# default: +CONFIG_SOC_PM_SUPPORT_TAGMEM_PD=y +# default: +CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD=y +# default: +CONFIG_SOC_PM_SUPPORT_RC_FAST_PD=y +# default: +CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD=y +# default: +CONFIG_SOC_PM_SUPPORT_MAC_BB_PD=y +# default: +CONFIG_SOC_PM_SUPPORT_MODEM_PD=y +# default: +CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED=y +# default: +CONFIG_SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY=y +# default: +CONFIG_SOC_PM_CPU_RETENTION_BY_RTCCNTL=y +# default: +CONFIG_SOC_PM_MODEM_RETENTION_BY_BACKUPDMA=y +# default: +CONFIG_SOC_PM_MODEM_PD_BY_SW=y +# default: +CONFIG_SOC_CLK_RC_FAST_D256_SUPPORTED=y +# default: +CONFIG_SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256=y +# default: +CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION=y +# default: +CONFIG_SOC_CLK_XTAL32K_SUPPORTED=y +# default: +CONFIG_SOC_CLK_LP_FAST_SUPPORT_XTAL_D2=y +# default: +CONFIG_SOC_EFUSE_DIS_DOWNLOAD_ICACHE=y +# default: +CONFIG_SOC_EFUSE_DIS_DOWNLOAD_DCACHE=y +# default: +CONFIG_SOC_EFUSE_HARD_DIS_JTAG=y +# default: +CONFIG_SOC_EFUSE_DIS_USB_JTAG=y +# default: +CONFIG_SOC_EFUSE_SOFT_DIS_JTAG=y +# default: +CONFIG_SOC_EFUSE_DIS_DIRECT_BOOT=y +# default: +CONFIG_SOC_EFUSE_DIS_ICACHE=y +# default: +CONFIG_SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK=y +# default: +CONFIG_SOC_EFUSE_XTS_AES_KEY_128=y +# default: +CONFIG_SOC_EFUSE_XTS_AES_KEY_256=y +# default: +CONFIG_SOC_SECURE_BOOT_V2_RSA=y +# default: +CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS=3 +# default: +CONFIG_SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS=y +# default: +CONFIG_SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY=y +# default: +CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX=64 +# default: +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES=y +# default: +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_OPTIONS=y +# default: +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128=y +# default: +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_256=y +# default: +CONFIG_SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE=16 +# default: +CONFIG_SOC_MEMPROT_MEM_ALIGN_SIZE=256 +# default: +CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE=21 +# default: +CONFIG_SOC_MAC_BB_PD_MEM_SIZE=192 +# default: +CONFIG_SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH=12 +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_RESUME=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_SW_SUSPEND=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_TIMING_TUNING=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_WRAP=y +# default: +CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY=y +# default: +CONFIG_SOC_MEMSPI_CORE_CLK_SHARED_WITH_PSRAM=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP=y +# default: +CONFIG_SOC_SPI_MEM_FLASH_SUPPORT_HPM=y +# default: +CONFIG_SOC_MEMSPI_ENCRYPTION_ALIGNMENT=16 +# default: +CONFIG_SOC_COEX_HW_PTI=y +# default: +CONFIG_SOC_EXTERNAL_COEX_LEADER_TX_LINE=y +# default: +CONFIG_SOC_SDMMC_USE_GPIO_MATRIX=y +# default: +CONFIG_SOC_SDMMC_NUM_SLOTS=2 +# default: +CONFIG_SOC_SDMMC_DATA_WIDTH_MAX=8 +# default: +CONFIG_SOC_SDMMC_DELAY_PHASE_NUM=4 +# default: +CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC=y +# default: +CONFIG_SOC_WIFI_HW_TSF=y +# default: +CONFIG_SOC_WIFI_FTM_SUPPORT=y +# default: +CONFIG_SOC_WIFI_GCMP_SUPPORT=y +# default: +CONFIG_SOC_WIFI_WAPI_SUPPORT=y +# default: +CONFIG_SOC_WIFI_TXOP_SUPPORT=y +# default: +CONFIG_SOC_WIFI_CSI_SUPPORT=y +# default: +CONFIG_SOC_WIFI_MESH_SUPPORT=y +# default: +CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW=y +# default: +CONFIG_SOC_WIFI_PHY_NEEDS_USB_WORKAROUND=y +# default: +CONFIG_SOC_BLE_SUPPORTED=y +# default: +CONFIG_SOC_BLE_MESH_SUPPORTED=y +# default: +CONFIG_SOC_BLE_50_SUPPORTED=y +# default: +CONFIG_SOC_BLE_DEVICE_PRIVACY_SUPPORTED=y +# default: +CONFIG_SOC_BLUFI_SUPPORTED=y +# default: +CONFIG_SOC_ULP_HAS_ADC=y +# default: +CONFIG_SOC_PHY_COMBO_MODULE=y +# default: +CONFIG_SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV=y +# default: +CONFIG_IDF_CMAKE=y +# default: +CONFIG_IDF_TOOLCHAIN="gcc" +# default: +CONFIG_IDF_TOOLCHAIN_GCC=y +# default: +CONFIG_IDF_TARGET_ARCH_XTENSA=y +# default: +CONFIG_IDF_TARGET_ARCH="xtensa" +# default: +CONFIG_IDF_TARGET="esp32s3" +# default: +CONFIG_IDF_INIT_VERSION="6.0.1" +# default: +CONFIG_IDF_TARGET_ESP32S3=y +# default: +CONFIG_IDF_FIRMWARE_CHIP_ID=0x0009 + +# +# Build type +# +# default: +CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y +# default: +# CONFIG_APP_BUILD_TYPE_RAM is not set +# default: +CONFIG_APP_BUILD_GENERATE_BINARIES=y +# default: +CONFIG_APP_BUILD_BOOTLOADER=y +# default: +CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y +# default: +# CONFIG_APP_REPRODUCIBLE_BUILD is not set +# default: +# CONFIG_APP_NO_BLOBS is not set +# end of Build type + +# +# App Update config +# +# end of App Update config + +# +# Bootloader config +# + +# +# Bootloader manager +# +# default: +CONFIG_BOOTLOADER_COMPILE_TIME_DATE=y +# default: +CONFIG_BOOTLOADER_PROJECT_VER=1 +# end of Bootloader manager + +# +# Application Rollback +# +# default: +# CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set +# end of Application Rollback + +# +# Recovery Bootloader and Rollback +# +# end of Recovery Bootloader and Rollback + +# default: +CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x0 +# default: +CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y +# default: +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set +# default: +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set + +# +# Log +# +# default: +CONFIG_BOOTLOADER_LOG_VERSION_1=y +# default: +CONFIG_BOOTLOADER_LOG_VERSION=1 +# default: +# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set +# default: +# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set +# default: +# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set +# default: +CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y +# default: +# CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set +# default: +# CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set +# default: +CONFIG_BOOTLOADER_LOG_LEVEL=3 + +# +# Format +# +# default: +# CONFIG_BOOTLOADER_LOG_COLORS is not set +# default: +CONFIG_BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS=y +# end of Format + +# +# Settings +# +# default: +CONFIG_BOOTLOADER_LOG_MODE_TEXT_EN=y +# default: +CONFIG_BOOTLOADER_LOG_MODE_TEXT=y +# end of Settings +# end of Log + +# default: +CONFIG_BOOTLOADER_CPU_CLK_FREQ_MHZ=80 + +# +# Serial Flash Configurations +# +# default: +# CONFIG_BOOTLOADER_FLASH_DC_AWARE is not set +# default: +CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y +# end of Serial Flash Configurations + +# default: +CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y +# default: +# CONFIG_BOOTLOADER_FACTORY_RESET is not set +# default: +# CONFIG_BOOTLOADER_APP_TEST is not set +# default: +CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE=y +# default: +CONFIG_BOOTLOADER_WDT_ENABLE=y +# default: +# CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set +# default: +CONFIG_BOOTLOADER_WDT_TIME_MS=9000 +# default: +# CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set +# default: +# CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON is not set +# default: +# CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS is not set +# default: +CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 +# default: +# CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set +# end of Bootloader config + +# +# Security features +# +# default: +CONFIG_SECURE_BOOT_V2_RSA_SUPPORTED=y +# default: +CONFIG_SECURE_BOOT_V2_PREFERRED=y +# default: +# CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set +# default: +# CONFIG_SECURE_BOOT is not set +# default: +# CONFIG_SECURE_FLASH_ENC_ENABLED is not set +# default: +CONFIG_SECURE_ROM_DL_MODE_ENABLED=y +# end of Security features + +# +# Application manager +# +# default: +CONFIG_APP_COMPILE_TIME_DATE=y +# default: +# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set +# default: +# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set +# default: +# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set +# default: +CONFIG_APP_RETRIEVE_LEN_ELF_SHA=9 +# end of Application manager + +# default: +CONFIG_ESP_ROM_HAS_CRC_LE=y +# default: +CONFIG_ESP_ROM_HAS_CRC_BE=y +# default: +CONFIG_ESP_ROM_HAS_MZ_CRC32=y +# default: +CONFIG_ESP_ROM_HAS_JPEG_DECODE=y +# default: +CONFIG_ESP_ROM_UART_CLK_IS_XTAL=y +# default: +CONFIG_ESP_ROM_HAS_RETARGETABLE_LOCKING=y +# default: +CONFIG_ESP_ROM_USB_OTG_NUM=3 +# default: +CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM=4 +# default: +CONFIG_ESP_ROM_HAS_ERASE_0_REGION_BUG=y +# default: +CONFIG_ESP_ROM_HAS_ENCRYPTED_WRITES_USING_LEGACY_DRV=y +# default: +CONFIG_ESP_ROM_GET_CLK_FREQ=y +# default: +CONFIG_ESP_ROM_HAS_HAL_WDT=y +# default: +CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND=y +# default: +CONFIG_ESP_ROM_HAS_LAYOUT_TABLE=y +# default: +CONFIG_ESP_ROM_HAS_SPI_FLASH=y +# default: +CONFIG_ESP_ROM_HAS_SPI_FLASH_MMAP=y +# default: +CONFIG_ESP_ROM_HAS_ETS_PRINTF_BUG=y +# default: +CONFIG_ESP_ROM_HAS_NEWLIB=y +# default: +CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT=y +# default: +CONFIG_ESP_ROM_HAS_NEWLIB_32BIT_TIME=y +# default: +CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE=y +# default: +CONFIG_ESP_ROM_RAM_APP_NEEDS_MMU_INIT=y +# default: +CONFIG_ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG=y +# default: +CONFIG_ESP_ROM_HAS_CACHE_SUSPEND_WAITI_BUG=y +# default: +CONFIG_ESP_ROM_HAS_CACHE_WRITEBACK_BUG=y +# default: +CONFIG_ESP_ROM_HAS_SW_FLOAT=y +# default: +CONFIG_ESP_ROM_HAS_VERSION=y +# default: +CONFIG_ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB=y +# default: +CONFIG_ESP_ROM_HAS_OUTPUT_PUTC_FUNC=y +# default: +CONFIG_ESP_ROM_CONSOLE_OUTPUT_SECONDARY=y + +# +# Boot ROM Behavior +# +# default: +CONFIG_BOOT_ROM_LOG_ALWAYS_ON=y +# default: +# CONFIG_BOOT_ROM_LOG_ALWAYS_OFF is not set +# default: +# CONFIG_BOOT_ROM_LOG_ON_GPIO_HIGH is not set +# default: +# CONFIG_BOOT_ROM_LOG_ON_GPIO_LOW is not set +# end of Boot ROM Behavior + +# +# Serial flasher config +# +# default: +# CONFIG_ESPTOOLPY_NO_STUB is not set +# default: +# CONFIG_ESPTOOLPY_OCT_FLASH is not set +# default: +CONFIG_ESPTOOLPY_FLASH_MODE_AUTO_DETECT=y +# default: +# CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set +# default: +# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set +# default: +CONFIG_ESPTOOLPY_FLASHMODE_DIO=y +# default: +# CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set +# default: +CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y +# default: +CONFIG_ESPTOOLPY_FLASHMODE="dio" +# default: +# CONFIG_ESPTOOLPY_FLASHFREQ_120M is not set +# default: +CONFIG_ESPTOOLPY_FLASHFREQ_80M=y +# default: +# CONFIG_ESPTOOLPY_FLASHFREQ_40M is not set +# default: +# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set +# default: +CONFIG_ESPTOOLPY_FLASHFREQ="80m" +# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y +# CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set +# default: +CONFIG_ESPTOOLPY_FLASHSIZE="16MB" +# default: +# CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set +# default: +CONFIG_ESPTOOLPY_BEFORE_RESET=y +# default: +# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set +# default: +CONFIG_ESPTOOLPY_BEFORE="default-reset" +# default: +CONFIG_ESPTOOLPY_AFTER_RESET=y +# default: +# CONFIG_ESPTOOLPY_AFTER_NORESET is not set +# default: +CONFIG_ESPTOOLPY_AFTER="hard-reset" +# default: +CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 +# end of Serial flasher config + +# +# Partition Table +# +# CONFIG_PARTITION_TABLE_SINGLE_APP is not set +# CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set +# CONFIG_PARTITION_TABLE_TWO_OTA is not set +# CONFIG_PARTITION_TABLE_TWO_OTA_LARGE is not set +CONFIG_PARTITION_TABLE_CUSTOM=y +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" +# default: +CONFIG_PARTITION_TABLE_FILENAME="partitions.csv" +# default: +CONFIG_PARTITION_TABLE_OFFSET=0x8000 +# default: +CONFIG_PARTITION_TABLE_MD5=y +# end of Partition Table + +# +# Compiler options +# +# CONFIG_COMPILER_OPTIMIZATION_DEBUG is not set +# CONFIG_COMPILER_OPTIMIZATION_SIZE is not set +CONFIG_COMPILER_OPTIMIZATION_PERF=y +# CONFIG_COMPILER_OPTIMIZATION_NONE is not set +# default: +CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y +# default: +# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set +# default: +# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set +# default: +# CONFIG_COMPILER_ASSERT_NDEBUG_EVALUATE is not set +# default: +CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB=y +# default: +CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=2 +# default: +# CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set +# default: +CONFIG_COMPILER_HIDE_PATHS_MACROS=y +# default: +# CONFIG_COMPILER_CXX_EXCEPTIONS is not set +# default: +# CONFIG_COMPILER_CXX_RTTI is not set +# default: +CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y +# default: +# CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set +# default: +# CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set +# default: +# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set +# default: +# CONFIG_COMPILER_NO_MERGE_CONSTANTS is not set +# default: +# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set +# default: +# CONFIG_COMPILER_DISABLE_DEFAULT_ERRORS is not set +# default: +# CONFIG_COMPILER_DISABLE_GCC12_WARNINGS is not set +# default: +# CONFIG_COMPILER_DISABLE_GCC13_WARNINGS is not set +# default: +# CONFIG_COMPILER_DISABLE_GCC14_WARNINGS is not set +# default: +# CONFIG_COMPILER_DISABLE_GCC15_WARNINGS is not set +# default: +# CONFIG_COMPILER_DUMP_RTL_FILES is not set +# default: +CONFIG_COMPILER_RT_LIB_GCCLIB=y +# default: +CONFIG_COMPILER_RT_LIB_NAME="gcc" +# default: +CONFIG_COMPILER_ORPHAN_SECTIONS_ERROR=y +# default: +# CONFIG_COMPILER_ORPHAN_SECTIONS_WARNING is not set +# default: +# CONFIG_COMPILER_ORPHAN_SECTIONS_PLACE is not set +# default: +# CONFIG_COMPILER_STATIC_ANALYZER is not set +# default: +CONFIG_COMPILER_CXX_GLIBCXX_CONSTEXPR_NO_CHANGE=y +# default: +# CONFIG_COMPILER_CXX_GLIBCXX_CONSTEXPR_COLD_CONSTEXPR is not set +# default: +# CONFIG_COMPILER_CXX_GLIBCXX_CONSTEXPR_COLD is not set +# end of Compiler options + +# +# Component config +# + +# +# Bluetooth +# +CONFIG_BT_ENABLED=y +# CONFIG_BT_BLUEDROID_ENABLED is not set +CONFIG_BT_NIMBLE_ENABLED=y +# CONFIG_BT_CONTROLLER_ONLY is not set +# default: +CONFIG_BT_CONTROLLER_ENABLED=y +# default: +# CONFIG_BT_CONTROLLER_DISABLED is not set + +# +# Common Options +# +# default: +CONFIG_BT_ALARM_MAX_NUM=50 +# default: +CONFIG_BT_SMP_CRYPTO_STACK_TINYCRYPT=y +# default: +# CONFIG_BT_SMP_CRYPTO_STACK_MBEDTLS is not set + +# +# BT Logs +# + +# +# Log Sources +# +# end of Log Sources + +# default: +# CONFIG_BT_LOG_CRITICAL_ONLY is not set +# default: +# CONFIG_BLE_LOG_ENABLED is not set + +# +# Legacy SPI Log Output (Deprecated - use BT Log Async Output instead) +# +# default: +# CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED is not set +# end of Legacy SPI Log Output (Deprecated - use BT Log Async Output instead) +# end of BT Logs + +# default: +# CONFIG_BT_LE_USED_MEM_STATISTICS_ENABLED is not set +# end of Common Options + +# +# NimBLE Options +# + +# +# General +# +# default: +CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_INTERNAL=y +# default: +# CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_EXTERNAL is not set +# default: +# CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_DEFAULT is not set +# default: +CONFIG_BT_NIMBLE_PINNED_TO_CORE=0 +# default: +CONFIG_BT_NIMBLE_PINNED_TO_CORE_0=y +# default: +# CONFIG_BT_NIMBLE_PINNED_TO_CORE_1 is not set +# default: +CONFIG_BT_NIMBLE_HOST_TASK_STACK_SIZE=4096 +# default: +CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE=y +# end of General + +# +# Roles and Profiles +# +# default: +CONFIG_BT_NIMBLE_ROLE_CENTRAL=y +CONFIG_BT_NIMBLE_ROLE_PERIPHERAL=y +# default: +CONFIG_BT_NIMBLE_ROLE_BROADCASTER=y +# default: +CONFIG_BT_NIMBLE_ROLE_OBSERVER=y +# default: +CONFIG_BT_NIMBLE_GATT_CLIENT=y +# default: +CONFIG_BT_NIMBLE_GATT_SERVER=y +# end of Roles and Profiles + +# +# Security (SMP) +# +# default: +CONFIG_BT_NIMBLE_SECURITY_ENABLE=y +# default: +CONFIG_BT_NIMBLE_SM_LEGACY=y +# default: +CONFIG_BT_NIMBLE_SM_SC=y +# default: +# CONFIG_BT_NIMBLE_SM_SC_DEBUG_KEYS is not set +# default: +CONFIG_BT_NIMBLE_LL_CFG_FEAT_LE_ENCRYPTION=y +# default: +CONFIG_BT_NIMBLE_SM_LVL=0 +# default: +CONFIG_BT_NIMBLE_SM_SC_ONLY=0 +# default: +# CONFIG_BT_NIMBLE_SMP_ID_RESET is not set +# default: +# CONFIG_BT_NIMBLE_NVS_PERSIST is not set +CONFIG_BT_NIMBLE_MAX_BONDS=1 +# default: +# CONFIG_BT_NIMBLE_HANDLE_REPEAT_PAIRING_DELETION is not set +# end of Security (SMP) + +# +# GAP +# +# default: +CONFIG_BT_NIMBLE_RPA_TIMEOUT=900 +# default: +CONFIG_BT_NIMBLE_WHITELIST_SIZE=12 +# default: +CONFIG_BT_NIMBLE_ENABLE_CONN_REATTEMPT=y +# default: +CONFIG_BT_NIMBLE_MAX_CONN_REATTEMPT=3 +# default: +CONFIG_BT_NIMBLE_HS_PVCY=y +# default: +# CONFIG_BT_NIMBLE_HOST_ALLOW_CONNECT_WITH_SCAN is not set +# default: +# CONFIG_BT_NIMBLE_HOST_QUEUE_CONG_CHECK is not set +CONFIG_BT_NIMBLE_MAX_CONNECTIONS=1 +# default: +CONFIG_BT_NIMBLE_MAX_CCCDS=8 +# default: +# CONFIG_BT_NIMBLE_CRYPTO_STACK_MBEDTLS is not set +CONFIG_BT_NIMBLE_HS_STOP_TIMEOUT_MS=5000 +# default: +CONFIG_BT_NIMBLE_USE_ESP_TIMER=y +# default: +# CONFIG_BT_NIMBLE_HS_FLOW_CTRL is not set +# end of GAP + +# +# GATT / ATT +# +CONFIG_BT_NIMBLE_ATT_PREFERRED_MTU=255 +# default: +CONFIG_BT_NIMBLE_ATT_MAX_PREP_ENTRIES=64 +# default: +CONFIG_BT_NIMBLE_GATT_MAX_PROCS=4 +# default: +# CONFIG_BT_NIMBLE_BLE_GATT_BLOB_TRANSFER is not set +# default: +# CONFIG_BT_NIMBLE_GATT_CACHING is not set +# default: +# CONFIG_BT_NIMBLE_INCL_SVC_DISCOVERY is not set +# end of GATT / ATT + +# +# L2CAP +# +# default: +CONFIG_BT_NIMBLE_L2CAP_COC_MAX_NUM=0 +# end of L2CAP + +# +# Memory Settings +# +# default: +CONFIG_BT_NIMBLE_MSYS_1_BLOCK_COUNT=12 +# default: +CONFIG_BT_NIMBLE_MSYS_1_BLOCK_SIZE=256 +# default: +CONFIG_BT_NIMBLE_MSYS_2_BLOCK_COUNT=24 +# default: +CONFIG_BT_NIMBLE_MSYS_2_BLOCK_SIZE=320 +# default: +CONFIG_BT_NIMBLE_TRANSPORT_ACL_FROM_LL_COUNT=24 +# default: +CONFIG_BT_NIMBLE_TRANSPORT_ACL_SIZE=255 +# default: +CONFIG_BT_NIMBLE_TRANSPORT_EVT_SIZE=70 +# default: +CONFIG_BT_NIMBLE_TRANSPORT_EVT_COUNT=30 +# default: +CONFIG_BT_NIMBLE_TRANSPORT_EVT_DISCARD_COUNT=8 +# default: +CONFIG_BT_NIMBLE_L2CAP_COC_SDU_BUFF_COUNT=1 +# default: +# CONFIG_BT_NIMBLE_MEMPOOL_RUNTIME_ALLOC is not set +# end of Memory Settings + +# +# BLE 5.x Features +# +# default: +CONFIG_BT_NIMBLE_50_FEATURE_SUPPORT=y +# default: +CONFIG_BT_NIMBLE_LL_CFG_FEAT_LE_2M_PHY=y +# default: +CONFIG_BT_NIMBLE_LL_CFG_FEAT_LE_CODED_PHY=y +# default: +# CONFIG_BT_NIMBLE_EXT_ADV is not set +# default: +# CONFIG_BT_NIMBLE_EXT_SCAN is not set +# default: +# CONFIG_BT_NIMBLE_ISO is not set +# end of BLE 5.x Features + +# +# Services +# +# default: +CONFIG_BT_NIMBLE_PROX_SERVICE=y +# default: +CONFIG_BT_NIMBLE_ANS_SERVICE=y +# default: +CONFIG_BT_NIMBLE_CTS_SERVICE=y +# default: +CONFIG_BT_NIMBLE_HTP_SERVICE=y +# default: +CONFIG_BT_NIMBLE_IPSS_SERVICE=y +# default: +CONFIG_BT_NIMBLE_TPS_SERVICE=y +# default: +CONFIG_BT_NIMBLE_IAS_SERVICE=y +# default: +CONFIG_BT_NIMBLE_LLS_SERVICE=y +# default: +CONFIG_BT_NIMBLE_SPS_SERVICE=y +# default: +CONFIG_BT_NIMBLE_HR_SERVICE=y +# default: +# CONFIG_BT_NIMBLE_HID_SERVICE is not set +# default: +CONFIG_BT_NIMBLE_BAS_SERVICE=y +# default: +# CONFIG_BT_NIMBLE_SVC_BAS_BATTERY_LEVEL_NOTIFY is not set +# default: +CONFIG_BT_NIMBLE_DIS_SERVICE=y +# default: +# CONFIG_BT_NIMBLE_SVC_DIS_MANUFACTURER_NAME is not set +# default: +# CONFIG_BT_NIMBLE_SVC_DIS_SERIAL_NUMBER is not set +# default: +# CONFIG_BT_NIMBLE_SVC_DIS_HARDWARE_REVISION is not set +# default: +# CONFIG_BT_NIMBLE_SVC_DIS_FIRMWARE_REVISION is not set +# default: +# CONFIG_BT_NIMBLE_SVC_DIS_SOFTWARE_REVISION is not set +# default: +# CONFIG_BT_NIMBLE_SVC_DIS_SYSTEM_ID is not set +# default: +# CONFIG_BT_NIMBLE_SVC_DIS_PNP_ID is not set +# default: +# CONFIG_BT_NIMBLE_SVC_DIS_INCLUDED is not set +# default: +CONFIG_BT_NIMBLE_GAP_SERVICE=y +CONFIG_BT_NIMBLE_SVC_GAP_DEVICE_NAME="Velxio-Deployer" +# default: +CONFIG_BT_NIMBLE_GAP_DEVICE_NAME_MAX_LEN=31 +# default: +CONFIG_BT_NIMBLE_SVC_GAP_APPEARANCE=0 +# default: +CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE_PERM=0 +# default: +CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE_PERM_ENC=0 +# default: +CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE_PERM_AUTHEN=0 +# default: +CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE_PERM_AUTHOR=0 +# default: +# CONFIG_BT_NIMBLE_SVC_GAP_GATT_SECURITY_LEVEL is not set +# default: +# CONFIG_BT_NIMBLE_SVC_GAP_RPA_ONLY is not set +# default: +CONFIG_BT_NIMBLE_SVC_GAP_CAR_CHAR_NOT_SUPP=y +# default: +# CONFIG_BT_NIMBLE_SVC_GAP_CAR_NOT_SUPP is not set +# default: +# CONFIG_BT_NIMBLE_SVC_GAP_CAR_SUPP is not set +# default: +CONFIG_BT_NIMBLE_SVC_GAP_CENT_ADDR_RESOLUTION=-1 + +# +# GAP Appearance write permissions +# +# default: +# CONFIG_BT_NIMBLE_SVC_GAP_APPEAR_WRITE is not set +# default: +CONFIG_BT_NIMBLE_SVC_GAP_APPEAR_WRITE_PERM=0 +# default: +CONFIG_BT_NIMBLE_SVC_GAP_APPEAR_WRITE_PERM_ENC=0 +# default: +CONFIG_BT_NIMBLE_SVC_GAP_APPEAR_WRITE_PERM_ATHN=0 +# default: +CONFIG_BT_NIMBLE_SVC_GAP_APPEAR_WRITE_PERM_ATHR=0 +# end of GAP Appearance write permissions + +# +# GAP device name write permissions +# +# default: +# CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE is not set +# end of GAP device name write permissions + +# +# Peripheral Preferred Connection Parameters (PPCP) settings +# +# default: +CONFIG_BT_NIMBLE_SVC_GAP_PPCP_MAX_CONN_INTERVAL=0 +# default: +CONFIG_BT_NIMBLE_SVC_GAP_PPCP_MIN_CONN_INTERVAL=0 +# default: +CONFIG_BT_NIMBLE_SVC_GAP_PPCP_SLAVE_LATENCY=0 +# default: +CONFIG_BT_NIMBLE_SVC_GAP_PPCP_SUPERVISION_TMO=0 +# end of Peripheral Preferred Connection Parameters (PPCP) settings +# end of Services + +# +# Extra Features +# +# default: +# CONFIG_BT_NIMBLE_DYNAMIC_SERVICE is not set +# default: +# CONFIG_BT_NIMBLE_BLUFI_ENABLE is not set +# default: +# CONFIG_BT_NIMBLE_ENC_ADV_DATA is not set +# default: +# CONFIG_BT_NIMBLE_ADV_UUID_CONCAT is not set +# default: +# CONFIG_BT_NIMBLE_GATTC_PROC_PREEMPTION_PROTECT is not set +# default: +# CONFIG_BT_NIMBLE_GATTC_AUTO_PAIR is not set +# default: +CONFIG_BT_NIMBLE_EATT_CHAN_NUM=0 +# default: +# CONFIG_BT_NIMBLE_SUBRATE is not set +# default: +# CONFIG_BT_NIMBLE_STATIC_PASSKEY is not set +# default: +CONFIG_BT_NIMBLE_DTM_MODE_TEST=y +# default: +CONFIG_BT_NIMBLE_MEM_OPTIMIZATION=y +# default: +CONFIG_BT_NIMBLE_STATIC_TO_DYNAMIC=y +# default: +CONFIG_BT_NIMBLE_SM_SIGN_CNT=y +# default: +CONFIG_BT_NIMBLE_CPFD_CAFD=y +# default: +CONFIG_BT_NIMBLE_RECONFIG_MTU=y +# default: +# CONFIG_BT_NIMBLE_LOW_SPEED_MODE is not set +# end of Extra Features + +# +# NimBLE Mesh +# +# default: +# CONFIG_BT_NIMBLE_MESH is not set +# end of NimBLE Mesh + +# +# Host-controller Transport +# +# default: +CONFIG_UART_HW_FLOWCTRL_DISABLE=y +# default: +# CONFIG_UART_HW_FLOWCTRL_CTS_RTS is not set +# default: +CONFIG_BT_NIMBLE_HCI_UART_FLOW_CTRL=0 +# default: +CONFIG_BT_NIMBLE_HCI_UART_RTS_PIN=19 +# default: +CONFIG_BT_NIMBLE_HCI_UART_CTS_PIN=23 +# end of Host-controller Transport + +# +# Debugging/Testing +# +# default: +# CONFIG_BT_NIMBLE_MEM_DEBUG is not set +# default: +# CONFIG_BT_NIMBLE_LOG_LEVEL_NONE is not set +# default: +# CONFIG_BT_NIMBLE_LOG_LEVEL_ERROR is not set +# default: +# CONFIG_BT_NIMBLE_LOG_LEVEL_WARNING is not set +# default: +CONFIG_BT_NIMBLE_LOG_LEVEL_INFO=y +# default: +# CONFIG_BT_NIMBLE_LOG_LEVEL_DEBUG is not set +# default: +CONFIG_BT_NIMBLE_LOG_LEVEL=1 +# default: +CONFIG_BT_NIMBLE_PRINT_ERR_NAME=y +# default: +# CONFIG_BT_NIMBLE_DEBUG is not set +# default: +# CONFIG_BT_NIMBLE_TEST_THROUGHPUT_TEST is not set +# end of Debugging/Testing + +# +# Vendor / Optimization +# +# default: +# CONFIG_BT_NIMBLE_VS_SUPPORT is not set +# default: +# CONFIG_BT_NIMBLE_HIGH_DUTY_ADV_ITVL is not set +# end of Vendor / Optimization + +# +# Helper Utils +# +# default: +CONFIG_BT_NIMBLE_CHK_HOST_STATUS=y +# default: +CONFIG_BT_NIMBLE_UTIL_API=y +# default: +CONFIG_BT_NIMBLE_EXTRA_ADV_FIELDS=y +# end of Helper Utils +# end of NimBLE Options + +# +# Controller Options +# +# default: +CONFIG_BT_CTRL_MODE_EFF=1 +# default: +CONFIG_BT_CTRL_BLE_MAX_ACT=6 +# default: +CONFIG_BT_CTRL_BLE_MAX_ACT_EFF=6 +# default: +CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB=0 +# default: +CONFIG_BT_CTRL_PINNED_TO_CORE_0=y +# default: +# CONFIG_BT_CTRL_PINNED_TO_CORE_1 is not set +# default: +CONFIG_BT_CTRL_PINNED_TO_CORE=0 +# default: +CONFIG_BT_CTRL_HCI_MODE_VHCI=y +# default: +# CONFIG_BT_CTRL_HCI_MODE_UART_H4 is not set +# default: +CONFIG_BT_CTRL_HCI_TL=1 +# default: +CONFIG_BT_CTRL_ADV_DUP_FILT_MAX=30 +# default: +CONFIG_BT_BLE_CCA_MODE_NONE=y +# default: +# CONFIG_BT_BLE_CCA_MODE_HW is not set +# default: +# CONFIG_BT_BLE_CCA_MODE_SW is not set +# default: +CONFIG_BT_BLE_CCA_MODE=0 +# default: +CONFIG_BT_CTRL_HW_CCA_VAL=75 +# default: +CONFIG_BT_CTRL_HW_CCA_EFF=0 +# default: +CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG=y +# default: +# CONFIG_BT_CTRL_CE_LENGTH_TYPE_CE is not set +# default: +# CONFIG_BT_CTRL_CE_LENGTH_TYPE_SD is not set +# default: +CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF=0 +# default: +CONFIG_BT_CTRL_TX_ANTENNA_INDEX_0=y +# default: +# CONFIG_BT_CTRL_TX_ANTENNA_INDEX_1 is not set +# default: +CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF=0 +# default: +CONFIG_BT_CTRL_RX_ANTENNA_INDEX_0=y +# default: +# CONFIG_BT_CTRL_RX_ANTENNA_INDEX_1 is not set +# default: +CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF=0 +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N24 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N21 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N18 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N15 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N12 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N9 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N6 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N3 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N0 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P3 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P6 is not set +# default: +CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P9=y +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P12 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P15 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P18 is not set +# default: +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P20 is not set +# default: +CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF=11 +# default: +CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP=y +# default: +CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM=100 +# default: +CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD=20 +# default: +CONFIG_BT_CTRL_BLE_SCAN_DUPL=y +# default: +CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DEVICE=y +# default: +# CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DATA is not set +# default: +# CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DATA_DEVICE is not set +# default: +CONFIG_BT_CTRL_SCAN_DUPL_TYPE=0 +# default: +CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE=100 +# default: +CONFIG_BT_CTRL_DUPL_SCAN_CACHE_REFRESH_PERIOD=0 +# default: +# CONFIG_BT_CTRL_BLE_MESH_SCAN_DUPL_EN is not set +# default: +# CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EN is not set +# default: +CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS=y +# default: +CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF=0 + +# +# MODEM SLEEP Options +# +# default: +# CONFIG_BT_CTRL_MODEM_SLEEP is not set +# end of MODEM SLEEP Options + +# default: +CONFIG_BT_CTRL_SLEEP_MODE_EFF=0 +# default: +CONFIG_BT_CTRL_SLEEP_CLOCK_EFF=0 +# default: +CONFIG_BT_CTRL_HCI_TL_EFF=1 +# default: +# CONFIG_BT_CTRL_AGC_RECORRECT_EN is not set +# default: +# CONFIG_BT_CTRL_SCAN_BACKOFF_UPPERLIMITMAX is not set +# default: +# CONFIG_BT_BLE_ADV_DATA_LENGTH_ZERO_AUX is not set +# default: +CONFIG_BT_CTRL_CHAN_ASS_EN=y +# default: +CONFIG_BT_CTRL_LE_PING_EN=y + +# +# BLE disconnects when Instant Passed (0x28) occurs +# +# default: +# CONFIG_BT_CTRL_BLE_LLCP_CONN_UPDATE is not set +# default: +# CONFIG_BT_CTRL_BLE_LLCP_CHAN_MAP_UPDATE is not set +# default: +# CONFIG_BT_CTRL_BLE_LLCP_PHY_UPDATE is not set +# end of BLE disconnects when Instant Passed (0x28) occurs + +# default: +# CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY is not set +# default: +CONFIG_BT_CTRL_DTM_ENABLE=y +# default: +CONFIG_BT_CTRL_BLE_MASTER=y +# default: +# CONFIG_BT_CTRL_BLE_TEST is not set +# default: +CONFIG_BT_CTRL_BLE_SCAN=y +# default: +CONFIG_BT_CTRL_BLE_SECURITY_ENABLE=y +# default: +CONFIG_BT_CTRL_BLE_ADV=y +# default: +# CONFIG_BT_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS is not set +# default: +CONFIG_BT_CTRL_BLE_MIN_CONN_INTERVAL_ENABLE=y + +# +# Controller debug log Options (Experimental) +# +# default: +# CONFIG_BT_CTRL_LE_LOG_EN is not set +# end of Controller debug log Options (Experimental) +# end of Controller Options + +# default: +# CONFIG_BT_HCI_LOG_DEBUG_EN is not set +# end of Bluetooth + +# default: +# CONFIG_BLE_MESH is not set + +# +# Console Library +# +# default: +# CONFIG_CONSOLE_SORTED_HELP is not set +# end of Console Library + +# +# Legacy Driver Configurations +# + +# +# Legacy TWAI Driver Configurations +# +# default: +# CONFIG_TWAI_ISR_IN_IRAM_LEGACY is not set +# default: +# CONFIG_TWAI_SUPPRESS_DEPRECATE_WARN is not set +# default: +# CONFIG_TWAI_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy TWAI Driver Configurations + +# +# Legacy I2C Driver Configurations +# +# default: +# CONFIG_I2C_SUPPRESS_DEPRECATE_WARN is not set +# default: +# CONFIG_I2C_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy I2C Driver Configurations + +# +# Legacy Touch Sensor Driver Configurations +# +# default: +# CONFIG_TOUCH_SUPPRESS_DEPRECATE_WARN is not set +# default: +# CONFIG_TOUCH_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy Touch Sensor Driver Configurations +# end of Legacy Driver Configurations + +# +# eFuse Bit Manager +# +# default: +# CONFIG_EFUSE_CUSTOM_TABLE is not set +# default: +# CONFIG_EFUSE_VIRTUAL is not set +# default: +CONFIG_EFUSE_MAX_BLK_LEN=256 +# end of eFuse Bit Manager + +# +# ESP-TLS +# +# default: +CONFIG_ESP_TLS_USING_MBEDTLS=y +# default: +# CONFIG_ESP_TLS_CUSTOM_STACK is not set +# default: +# CONFIG_ESP_TLS_USE_SECURE_ELEMENT is not set +# default: +CONFIG_ESP_TLS_USE_DS_PERIPHERAL=y +# default: +# CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS is not set +# default: +# CONFIG_ESP_TLS_SERVER_SESSION_TICKETS is not set +# default: +# CONFIG_ESP_TLS_SERVER_CERT_SELECT_HOOK is not set +# default: +# CONFIG_ESP_TLS_SERVER_MIN_AUTH_MODE_OPTIONAL is not set +# default: +# CONFIG_ESP_TLS_PSK_VERIFICATION is not set +# default: +# CONFIG_ESP_TLS_INSECURE is not set +# default: +CONFIG_ESP_TLS_DYN_BUF_STRATEGY_SUPPORTED=y +# end of ESP-TLS + +# +# ADC and ADC Calibration +# +# default: +# CONFIG_ADC_ONESHOT_CTRL_FUNC_IN_IRAM is not set +# default: +# CONFIG_ADC_CONTINUOUS_ISR_IRAM_SAFE is not set +# default: +# CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3 is not set +# default: +# CONFIG_ADC_ENABLE_DEBUG_LOG is not set +# end of ADC and ADC Calibration + +# +# Wireless Coexistence +# +# default: +CONFIG_ESP_COEX_ENABLED=y +# default: +CONFIG_ESP_COEX_SW_COEXIST_ENABLE=y +# default: +# CONFIG_ESP_COEX_POWER_MANAGEMENT is not set +# default: +# CONFIG_ESP_COEX_GPIO_DEBUG is not set +# end of Wireless Coexistence + +# +# Common ESP-related +# +# default: +CONFIG_ESP_ERR_TO_NAME_LOOKUP=y +# end of Common ESP-related + +# +# ESP-Driver:Camera Controller Configurations +# +# default: +# CONFIG_CAM_CTLR_DVP_CAM_ISR_CACHE_SAFE is not set +# end of ESP-Driver:Camera Controller Configurations + +# +# GDMA Configurations +# +# default: +CONFIG_GDMA_CTRL_FUNC_IN_IRAM=y +# default: +CONFIG_GDMA_ISR_HANDLER_IN_IRAM=y +# default: +CONFIG_GDMA_OBJ_DRAM_SAFE=y +# default: +# CONFIG_GDMA_ENABLE_DEBUG_LOG is not set +# end of GDMA Configurations + +# +# ESP-Driver:GPIO Configurations +# +# default: +# CONFIG_GPIO_CTRL_FUNC_IN_IRAM is not set +# end of ESP-Driver:GPIO Configurations + +# +# ESP-Driver:GPTimer Configurations +# +# default: +CONFIG_GPTIMER_ISR_HANDLER_IN_IRAM=y +# default: +# CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM is not set +# default: +# CONFIG_GPTIMER_ISR_CACHE_SAFE is not set +# default: +CONFIG_GPTIMER_OBJ_CACHE_SAFE=y +# default: +# CONFIG_GPTIMER_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:GPTimer Configurations + +# +# ESP-Driver:I2C Configurations +# +# default: +# CONFIG_I2C_ISR_IRAM_SAFE is not set +# default: +# CONFIG_I2C_ENABLE_DEBUG_LOG is not set +# default: +CONFIG_I2C_MASTER_ISR_HANDLER_IN_IRAM=y +# end of ESP-Driver:I2C Configurations + +# +# ESP-Driver:I2S Configurations +# +# default: +# CONFIG_I2S_ISR_IRAM_SAFE is not set +# default: +# CONFIG_I2S_CTRL_FUNC_IN_IRAM is not set +# default: +# CONFIG_I2S_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:I2S Configurations + +# +# ESP-Driver:I3C Master Configurations +# +# default: +# CONFIG_I3C_MASTER_ISR_CACHE_SAFE is not set +# default: +# CONFIG_I3C_MASTER_ENABLE_DEBUG_LOG is not set +# default: +# CONFIG_I3C_MASTER_ISR_HANDLER_IN_IRAM is not set +# end of ESP-Driver:I3C Master Configurations + +# +# ESP-Driver:LEDC Configurations +# +# default: +# CONFIG_LEDC_CTRL_FUNC_IN_IRAM is not set +# end of ESP-Driver:LEDC Configurations + +# +# ESP-Driver:MCPWM Configurations +# +# default: +CONFIG_MCPWM_ISR_HANDLER_IN_IRAM=y +# default: +# CONFIG_MCPWM_ISR_CACHE_SAFE is not set +# default: +# CONFIG_MCPWM_CTRL_FUNC_IN_IRAM is not set +# default: +CONFIG_MCPWM_OBJ_CACHE_SAFE=y +# default: +# CONFIG_MCPWM_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:MCPWM Configurations + +# +# ESP-Driver:PCNT Configurations +# +# default: +# CONFIG_PCNT_CTRL_FUNC_IN_IRAM is not set +# default: +# CONFIG_PCNT_ISR_IRAM_SAFE is not set +# default: +# CONFIG_PCNT_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:PCNT Configurations + +# +# ESP-Driver:RMT Configurations +# +# default: +CONFIG_RMT_ENCODER_FUNC_IN_IRAM=y +# default: +CONFIG_RMT_TX_ISR_HANDLER_IN_IRAM=y +# default: +CONFIG_RMT_RX_ISR_HANDLER_IN_IRAM=y +# default: +# CONFIG_RMT_RECV_FUNC_IN_IRAM is not set +# default: +# CONFIG_RMT_TX_ISR_CACHE_SAFE is not set +# default: +# CONFIG_RMT_RX_ISR_CACHE_SAFE is not set +# default: +CONFIG_RMT_OBJ_CACHE_SAFE=y +# default: +# CONFIG_RMT_ENABLE_DEBUG_LOG is not set +# default: +# CONFIG_RMT_ISR_IRAM_SAFE is not set +# end of ESP-Driver:RMT Configurations + +# +# ESP-Driver:Sigma Delta Modulator Configurations +# +# default: +# CONFIG_SDM_CTRL_FUNC_IN_IRAM is not set +# default: +# CONFIG_SDM_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:Sigma Delta Modulator Configurations + +# +# ESP-Driver:SD Host SDMMC Controller Configurations +# +# default: +# CONFIG_SD_HOST_SDMMC_ISR_CACHE_SAFE is not set +# end of ESP-Driver:SD Host SDMMC Controller Configurations + +# +# ESP-Driver:SPI Configurations +# +# default: +CONFIG_SPI_MASTER_ISR_IN_IRAM=y +# default: +# CONFIG_SPI_SLAVE_IN_IRAM is not set +# default: +CONFIG_SPI_SLAVE_ISR_IN_IRAM=y +# end of ESP-Driver:SPI Configurations + +# +# ESP-Driver:Touch Sensor Configurations +# +# default: +# CONFIG_TOUCH_CTRL_FUNC_IN_IRAM is not set +# default: +# CONFIG_TOUCH_ISR_IRAM_SAFE is not set +# default: +# CONFIG_TOUCH_ENABLE_DEBUG_LOG is not set +# default: +# CONFIG_TOUCH_SKIP_FSM_CHECK is not set +# end of ESP-Driver:Touch Sensor Configurations + +# +# ESP-Driver:Temperature Sensor Configurations +# +# default: +# CONFIG_TEMP_SENSOR_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:Temperature Sensor Configurations + +# +# ESP-Driver:TWAI Configurations +# +# default: +# CONFIG_TWAI_ISR_IN_IRAM is not set +# default: +# CONFIG_TWAI_IO_FUNC_IN_IRAM is not set +# default: +# CONFIG_TWAI_ISR_CACHE_SAFE is not set +# default: +# CONFIG_TWAI_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:TWAI Configurations + +# +# ESP-Driver:UART Configurations +# +# default: +# CONFIG_UART_ISR_IN_IRAM is not set +# end of ESP-Driver:UART Configurations + +# +# ESP-Driver:UHCI Configurations +# +# default: +# CONFIG_UHCI_ISR_HANDLER_IN_IRAM is not set +# default: +# CONFIG_UHCI_ISR_CACHE_SAFE is not set +# default: +# CONFIG_UHCI_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:UHCI Configurations + +# +# ESP-Driver:USB Serial/JTAG Configuration +# +# default: +CONFIG_USJ_ENABLE_USB_SERIAL_JTAG=y +# end of ESP-Driver:USB Serial/JTAG Configuration + +# +# Ethernet +# +# default: +CONFIG_ETH_ENABLED=y +# default: +CONFIG_ETH_USE_SPI_ETHERNET=y +# default: +# CONFIG_ETH_USE_OPENETH is not set +# default: +# CONFIG_ETH_TRANSMIT_MUTEX is not set +# end of Ethernet + +# +# Event Loop Library +# +# default: +# CONFIG_ESP_EVENT_LOOP_PROFILING is not set +# default: +CONFIG_ESP_EVENT_POST_FROM_ISR=y +# default: +CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y +# end of Event Loop Library + +# +# GDB Stub +# +# default: +CONFIG_ESP_GDBSTUB_ENABLED=y +# default: +# CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME is not set +# default: +CONFIG_ESP_GDBSTUB_SUPPORT_TASKS=y +# default: +CONFIG_ESP_GDBSTUB_MAX_TASKS=32 +# end of GDB Stub + +# +# ESP HID +# +# default: +CONFIG_ESPHID_TASK_SIZE_BT=2048 +# default: +CONFIG_ESPHID_TASK_SIZE_BLE=4096 +# end of ESP HID + +# +# ESP HTTP client +# +# default: +CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y +# default: +# CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH is not set +# default: +# CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH is not set +# default: +# CONFIG_ESP_HTTP_CLIENT_ENABLE_CUSTOM_TRANSPORT is not set +# default: +# CONFIG_ESP_HTTP_CLIENT_ENABLE_GET_CONTENT_RANGE is not set +# default: +CONFIG_ESP_HTTP_CLIENT_EVENT_POST_TIMEOUT=2000 +# default: +# CONFIG_ESP_HTTP_CLIENT_SAVE_RESPONSE_HEADERS is not set +# end of ESP HTTP client + +# +# HTTP Server +# +# default: +CONFIG_HTTPD_MAX_REQ_HDR_LEN=1024 +# default: +CONFIG_HTTPD_MAX_URI_LEN=512 +# default: +CONFIG_HTTPD_ERR_RESP_NO_DELAY=y +# default: +CONFIG_HTTPD_PURGE_BUF_LEN=32 +# default: +# CONFIG_HTTPD_LOG_PURGE_DATA is not set +# default: +# CONFIG_HTTPD_WS_SUPPORT is not set +# default: +# CONFIG_HTTPD_QUEUE_WORK_BLOCKING is not set +# default: +CONFIG_HTTPD_SERVER_EVENT_POST_TIMEOUT=2000 +# end of HTTP Server + +# +# ESP HTTPS OTA +# +# default: +# CONFIG_ESP_HTTPS_OTA_DECRYPT_CB is not set +# default: +# CONFIG_ESP_HTTPS_OTA_ALLOW_HTTP is not set +# default: +CONFIG_ESP_HTTPS_OTA_EVENT_POST_TIMEOUT=2000 +# default: +# CONFIG_ESP_HTTPS_OTA_ENABLE_PARTIAL_DOWNLOAD is not set +# end of ESP HTTPS OTA + +# +# ESP HTTPS server +# +# default: +# CONFIG_ESP_HTTPS_SERVER_ENABLE is not set +# default: +CONFIG_ESP_HTTPS_SERVER_EVENT_POST_TIMEOUT=2000 +# default: +# CONFIG_ESP_HTTPS_SERVER_CERT_SELECT_HOOK is not set +# end of ESP HTTPS server + +# +# Hardware Settings +# +# default: +CONFIG_ESP_HW_SUPPORT_FUNC_IN_IRAM=y + +# +# Chip revision +# +# default: +CONFIG_ESP32S3_REV_MIN_0=y +# default: +# CONFIG_ESP32S3_REV_MIN_1 is not set +# default: +# CONFIG_ESP32S3_REV_MIN_2 is not set +# default: +CONFIG_ESP32S3_REV_MIN_FULL=0 +# default: +CONFIG_ESP_REV_MIN_FULL=0 + +# +# Maximum Supported ESP32-S3 Revision (Rev v0.99) +# +# default: +CONFIG_ESP32S3_REV_MAX_FULL=99 +# default: +CONFIG_ESP_REV_MAX_FULL=99 +# default: +CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL=0 +# default: +CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL=199 + +# +# Maximum Supported ESP32-S3 eFuse Block Revision (eFuse Block Rev v1.99) +# +# end of Chip revision + +# +# MAC Config +# +# default: +CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y +# default: +CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y +# default: +CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y +# default: +CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y +# default: +CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR=y +# default: +CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES=4 +# default: +# CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO is not set +# default: +CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR=y +# default: +CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES=4 +# default: +# CONFIG_ESP_MAC_USE_CUSTOM_MAC_AS_BASE_MAC is not set +# end of MAC Config + +# +# Sleep Config +# +# default: +CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND=y +# default: +CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND=y +# default: +CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU=y +# default: +CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y +# default: +CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND=y +# default: +CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY=2000 +# default: +# CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION is not set +# default: +# CONFIG_ESP_SLEEP_DEBUG is not set +# default: +CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS=y +# end of Sleep Config + +# +# RTC Clock Config +# +# default: +CONFIG_RTC_CLK_SRC_INT_RC=y +# default: +# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set +# default: +# CONFIG_RTC_CLK_SRC_EXT_OSC is not set +# default: +# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set +# default: +CONFIG_RTC_CLK_CAL_CYCLES=1024 +# default: +CONFIG_RTC_CLK_FUNC_IN_IRAM=y +# default: +CONFIG_RTC_TIME_FUNC_IN_IRAM=y +# end of RTC Clock Config + +# +# Peripheral Control +# +# default: +CONFIG_ESP_PERIPH_CTRL_FUNC_IN_IRAM=y +# default: +CONFIG_ESP_REGI2C_CTRL_FUNC_IN_IRAM=y +# end of Peripheral Control + +# +# Main XTAL Config +# +# default: +CONFIG_XTAL_FREQ_40=y +# default: +CONFIG_XTAL_FREQ=40 +# end of Main XTAL Config + +# +# Power Supplier +# + +# +# Brownout Detector +# +# default: +CONFIG_ESP_BROWNOUT_DET=y +# default: +CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7=y +# default: +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6 is not set +# default: +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_5 is not set +# default: +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_4 is not set +# default: +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_3 is not set +# default: +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_2 is not set +# default: +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_1 is not set +# default: +CONFIG_ESP_BROWNOUT_DET_LVL=7 +# default: +CONFIG_ESP_BROWNOUT_USE_INTR=y +# end of Brownout Detector +# end of Power Supplier + +# default: +CONFIG_ESP_SPI_BUS_LOCK_ISR_FUNCS_IN_IRAM=y +# default: +CONFIG_ESP_INTR_IN_IRAM=y +# end of Hardware Settings + +# +# ESP-Driver:LCD Controller Configurations +# +# default: +# CONFIG_LCD_RGB_ISR_IRAM_SAFE is not set +# default: +# CONFIG_LCD_RGB_RESTART_IN_VSYNC is not set +# default: +# CONFIG_LCD_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:LCD Controller Configurations + +# +# LibC +# +# default: +# CONFIG_LIBC_NEWLIB is not set +# default: +CONFIG_LIBC_PICOLIBC=y +# default: +CONFIG_LIBC_PICOLIBC_NEWLIB_COMPATIBILITY=y +# default: +CONFIG_LIBC_MISC_IN_IRAM=y +# default: +CONFIG_LIBC_LOCKS_PLACE_IN_IRAM=y +# default: +CONFIG_LIBC_STDOUT_LINE_ENDING_CRLF=y +# default: +# CONFIG_LIBC_STDOUT_LINE_ENDING_LF is not set +# default: +# CONFIG_LIBC_STDOUT_LINE_ENDING_CR is not set +# default: +# CONFIG_LIBC_STDIN_LINE_ENDING_CRLF is not set +# default: +# CONFIG_LIBC_STDIN_LINE_ENDING_LF is not set +# default: +CONFIG_LIBC_STDIN_LINE_ENDING_CR=y +# default: +CONFIG_LIBC_TIME_SYSCALL_USE_RTC_HRT=y +# default: +# CONFIG_LIBC_TIME_SYSCALL_USE_RTC is not set +# default: +# CONFIG_LIBC_TIME_SYSCALL_USE_HRT is not set +# default: +# CONFIG_LIBC_TIME_SYSCALL_USE_NONE is not set +# default: +CONFIG_LIBC_ASSERT_BUFFER_SIZE=200 +# end of LibC + +# default: +CONFIG_STDATOMIC_S32C1I_SPIRAM_WORKAROUND=y + +# +# ESP-MM: Memory Management Configurations +# +# default: +# CONFIG_ESP_MM_CACHE_MSYNC_C2M_CHUNKED_OPS is not set +# end of ESP-MM: Memory Management Configurations + +# +# ESP NETIF Adapter +# +# default: +CONFIG_ESP_NETIF_LOST_IP_TIMER_ENABLE=y +# default: +CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 +# default: +# CONFIG_ESP_NETIF_PROVIDE_CUSTOM_IMPLEMENTATION is not set +# default: +CONFIG_ESP_NETIF_TCPIP_LWIP=y +# default: +# CONFIG_ESP_NETIF_LOOPBACK is not set +# default: +CONFIG_ESP_NETIF_USES_TCPIP_WITH_BSD_API=y +# default: +CONFIG_ESP_NETIF_REPORT_DATA_TRAFFIC=y +# default: +CONFIG_ESP_NETIF_RECEIVE_REPORT_ERRORS=y +# default: +# CONFIG_ESP_NETIF_L2_TAP is not set +# default: +# CONFIG_ESP_NETIF_BRIDGE_EN is not set +# default: +# CONFIG_ESP_NETIF_SET_DNS_PER_DEFAULT_NETIF is not set +# end of ESP NETIF Adapter + +# +# Partition API Configuration +# +# end of Partition API Configuration + +# +# PHY +# +# default: +CONFIG_ESP_PHY_ENABLED=y +# default: +CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y +# default: +# CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION is not set +# default: +CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 +# default: +CONFIG_ESP_PHY_MAX_TX_POWER=20 +# default: +# CONFIG_ESP_PHY_REDUCE_TX_POWER is not set +# default: +CONFIG_ESP_PHY_ENABLE_USB=y +# default: +# CONFIG_ESP_PHY_ENABLE_CERT_TEST is not set +# default: +CONFIG_ESP_PHY_RF_CAL_PARTIAL=y +# default: +# CONFIG_ESP_PHY_RF_CAL_NONE is not set +# default: +# CONFIG_ESP_PHY_RF_CAL_FULL is not set +# default: +CONFIG_ESP_PHY_CALIBRATION_MODE=0 +# default: +CONFIG_ESP_PHY_PLL_TRACK_PERIOD_MS=1000 +# default: +# CONFIG_ESP_PHY_PLL_TRACK_DEBUG is not set +# default: +# CONFIG_ESP_PHY_RECORD_USED_TIME is not set +# default: +CONFIG_ESP_PHY_IRAM_OPT=y +# default: +# CONFIG_ESP_PHY_DEBUG is not set +# default: +CONFIG_ESP_PHY_ENABLE_VERSION_PRINT=y +# end of PHY + +# +# Power Management +# +# default: +# CONFIG_PM_SLEEP_FUNC_IN_IRAM is not set +# default: +# CONFIG_PM_ENABLE is not set +# default: +# CONFIG_PM_SLP_IRAM_OPT is not set +# default: +CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP=y +# default: +CONFIG_PM_RESTORE_CACHE_TAGMEM_AFTER_LIGHT_SLEEP=y +# default: +CONFIG_PM_ESP_SLEEP_POWER_DOWN_CPU=y +# end of Power Management + +# +# ESP PSRAM +# +CONFIG_SPIRAM=y + +# +# SPI RAM config +# +# CONFIG_SPIRAM_MODE_QUAD is not set +CONFIG_SPIRAM_MODE_OCT=y +CONFIG_SPIRAM_TYPE_AUTO=y +# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set +# default: +CONFIG_SPIRAM_CLK_IO=30 +# default: +CONFIG_SPIRAM_CS_IO=26 +# default: +# CONFIG_SPIRAM_XIP_FROM_PSRAM is not set +# default: +# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set +# default: +# CONFIG_SPIRAM_RODATA is not set +# default: +# CONFIG_SPIRAM_SPEED_80M is not set +# default: +CONFIG_SPIRAM_SPEED_40M=y +# default: +CONFIG_SPIRAM_SPEED=40 +# default: +# CONFIG_SPIRAM_ECC_ENABLE is not set +# default: +CONFIG_SPIRAM_BOOT_HW_INIT=y +# default: +CONFIG_SPIRAM_BOOT_INIT=y +# default: +CONFIG_SPIRAM_PRE_CONFIGURE_MEMORY_PROTECTION=y +# default: +# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set +# CONFIG_SPIRAM_USE_MEMMAP is not set +CONFIG_SPIRAM_USE_CAPS_ALLOC=y +# CONFIG_SPIRAM_USE_MALLOC is not set +# default: +CONFIG_SPIRAM_MEMTEST=y +# default: +# CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP is not set +# default: +# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set +# default: +# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set +# end of SPI RAM config +# end of ESP PSRAM + +# +# ESP Ringbuf +# +# default: +# CONFIG_RINGBUF_IN_IRAM is not set +# default: +# CONFIG_RINGBUF_PLACE_ISR_FUNCTIONS_INTO_FLASH is not set +# end of ESP Ringbuf + +# +# ESP-ROM +# +# default: +CONFIG_ESP_ROM_PRINT_IN_IRAM=y +# end of ESP-ROM + +# +# ESP Security Specific +# +# end of ESP Security Specific + +# +# ESP-STDIO +# +CONFIG_ESP_CONSOLE_UART_DEFAULT=y +# CONFIG_ESP_CONSOLE_USB_CDC is not set +# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG is not set +# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set +# CONFIG_ESP_CONSOLE_NONE is not set +# default: +# CONFIG_ESP_CONSOLE_SECONDARY_NONE is not set +# default: +CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG=y +# default: +CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED=y +# default: +CONFIG_ESP_CONSOLE_UART=y +# default: +CONFIG_ESP_CONSOLE_UART_NUM=0 +# default: +CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM=0 +# default: +CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 +# end of ESP-STDIO + +# +# ESP System Settings +# +# default: +# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set +# default: +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y +# default: +# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set +# default: +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160 + +# +# Cache config +# +# default: +CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB=y +# default: +# CONFIG_ESP32S3_INSTRUCTION_CACHE_32KB is not set +# default: +CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE=0x4000 +# default: +# CONFIG_ESP32S3_INSTRUCTION_CACHE_4WAYS is not set +# default: +CONFIG_ESP32S3_INSTRUCTION_CACHE_8WAYS=y +# default: +CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS=8 +# default: +# CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_16B is not set +# default: +CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_32B=y +# default: +CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE=32 +# default: +# CONFIG_ESP32S3_DATA_CACHE_16KB is not set +# default: +CONFIG_ESP32S3_DATA_CACHE_32KB=y +# default: +# CONFIG_ESP32S3_DATA_CACHE_64KB is not set +# default: +CONFIG_ESP32S3_DATA_CACHE_SIZE=0x8000 +# default: +# CONFIG_ESP32S3_DATA_CACHE_4WAYS is not set +# default: +CONFIG_ESP32S3_DATA_CACHE_8WAYS=y +# default: +CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS=8 +# default: +# CONFIG_ESP32S3_DATA_CACHE_LINE_16B is not set +# default: +CONFIG_ESP32S3_DATA_CACHE_LINE_32B=y +# default: +# CONFIG_ESP32S3_DATA_CACHE_LINE_64B is not set +# default: +CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE=32 +# end of Cache config + +# +# Memory +# +# default: +# CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set +# default: +# CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set +# end of Memory + +# +# Trace memory +# +# default: +# CONFIG_ESP32S3_TRAX is not set +# default: +CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM=0x0 +# end of Trace memory + +# default: +CONFIG_ESP_SYSTEM_IN_IRAM=y +# default: +# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set +# default: +CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y +# default: +# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set +# default: +# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set +# default: +CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS=0 +# default: +CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y +# default: +CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y +# default: +CONFIG_ESP_SYSTEM_MEMPROT=y +# default: +CONFIG_ESP_SYSTEM_MEMPROT_PMS=y +# default: +CONFIG_ESP_SYSTEM_MEMPROT_PMS_LOCK=y +# default: +CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 +# default: +CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 +# default: +CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584 +# default: +CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y +# default: +# CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1 is not set +# default: +# CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set +# default: +CONFIG_ESP_MAIN_TASK_AFFINITY=0x0 +# default: +CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 +# default: +CONFIG_ESP_INT_WDT=y +# default: +CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 +# default: +CONFIG_ESP_INT_WDT_CHECK_CPU1=y +# default: +CONFIG_ESP_TASK_WDT_EN=y +# default: +CONFIG_ESP_TASK_WDT_INIT=y +# default: +# CONFIG_ESP_TASK_WDT_PANIC is not set +# default: +CONFIG_ESP_TASK_WDT_TIMEOUT_S=5 +# default: +CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y +# default: +CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y +# default: +# CONFIG_ESP_PANIC_HANDLER_IRAM is not set +# default: +# CONFIG_ESP_DEBUG_STUBS_ENABLE is not set +# default: +CONFIG_ESP_DEBUG_OCDAWARE=y +# default: +CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y +# default: +CONFIG_ESP_SYSTEM_BBPLL_RECALIB=y +# end of ESP System Settings + +# +# IPC (Inter-Processor Call) +# +# default: +CONFIG_ESP_IPC_ENABLE=y +# default: +CONFIG_ESP_IPC_TASK_STACK_SIZE=1280 +# default: +CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y +# default: +CONFIG_ESP_IPC_ISR_ENABLE=y +# end of IPC (Inter-Processor Call) + +# +# ESP Timer (High Resolution Timer) +# +# default: +CONFIG_ESP_TIMER_IN_IRAM=y +# default: +# CONFIG_ESP_TIMER_PROFILING is not set +# default: +CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER=y +# default: +CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y +# default: +CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 +# default: +CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1 +# default: +# CONFIG_ESP_TIMER_SHOW_EXPERIMENTAL is not set +# default: +CONFIG_ESP_TIMER_TASK_AFFINITY=0x0 +# default: +CONFIG_ESP_TIMER_TASK_AFFINITY_CPU0=y +# default: +CONFIG_ESP_TIMER_ISR_AFFINITY_CPU0=y +# default: +# CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is not set +# default: +CONFIG_ESP_TIMER_IMPL_SYSTIMER=y +# end of ESP Timer (High Resolution Timer) + +# +# ESP Trace Configuration +# +# default: +# CONFIG_ESP_TRACE_LIB_EXTERNAL is not set +# default: +CONFIG_ESP_TRACE_LIB_NONE=y +# default: +CONFIG_ESP_TRACE_LIB_NAME="none" +# default: +# CONFIG_ESP_TRACE_TRANSPORT_APPTRACE is not set +# default: +CONFIG_ESP_TRACE_TRANSPORT_NONE=y +# default: +CONFIG_ESP_TRACE_TRANSPORT_NAME="none" +# end of ESP Trace Configuration + +# +# Wi-Fi +# +# default: +CONFIG_ESP_WIFI_ENABLED=y +# default: +CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM=10 +# default: +CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM=32 +# default: +# CONFIG_ESP_WIFI_STATIC_TX_BUFFER is not set +# default: +CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER=y +# default: +CONFIG_ESP_WIFI_TX_BUFFER_TYPE=1 +# default: +CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER_NUM=32 +# default: +CONFIG_ESP_WIFI_STATIC_RX_MGMT_BUFFER=y +# default: +# CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUFFER is not set +# default: +CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUF=0 +# default: +CONFIG_ESP_WIFI_RX_MGMT_BUF_NUM_DEF=5 +# default: +# CONFIG_ESP_WIFI_CSI_ENABLED is not set +# default: +CONFIG_ESP_WIFI_AMPDU_TX_ENABLED=y +# default: +CONFIG_ESP_WIFI_TX_BA_WIN=6 +# default: +CONFIG_ESP_WIFI_AMPDU_RX_ENABLED=y +# default: +CONFIG_ESP_WIFI_RX_BA_WIN=6 +# default: +CONFIG_ESP_WIFI_NVS_ENABLED=y +# default: +CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_0=y +# default: +# CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_1 is not set +# default: +CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN=752 +# default: +CONFIG_ESP_WIFI_MGMT_SBUF_NUM=32 +# default: +CONFIG_ESP_WIFI_IRAM_OPT=y +# default: +# CONFIG_ESP_WIFI_EXTRA_IRAM_OPT is not set +# default: +CONFIG_ESP_WIFI_RX_IRAM_OPT=y +# default: +CONFIG_ESP_WIFI_ENABLE_WPA3_SAE=y +# default: +CONFIG_ESP_WIFI_ENABLE_SAE_H2E=y +# default: +CONFIG_ESP_WIFI_ENABLE_SAE_PK=y +# default: +CONFIG_ESP_WIFI_SOFTAP_SAE_SUPPORT=y +# default: +CONFIG_ESP_WIFI_ENABLE_WPA3_OWE_STA=y +# default: +CONFIG_ESP_WIFI_WPA3_COMPATIBLE_SUPPORT=y +# default: +# CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set +# default: +CONFIG_ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME=50 +# default: +# CONFIG_ESP_WIFI_BSS_MAX_IDLE_SUPPORT is not set +# default: +CONFIG_ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME=10 +# default: +CONFIG_ESP_WIFI_SLP_DEFAULT_WAIT_BROADCAST_DATA_TIME=15 +# default: +# CONFIG_ESP_WIFI_FTM_ENABLE is not set +# default: +CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE=y +# default: +# CONFIG_ESP_WIFI_GCMP_SUPPORT is not set +# default: +CONFIG_ESP_WIFI_GMAC_SUPPORT=y +# default: +CONFIG_ESP_WIFI_SOFTAP_SUPPORT=y +# default: +# CONFIG_ESP_WIFI_SLP_BEACON_LOST_OPT is not set +# default: +CONFIG_ESP_WIFI_ESPNOW_MAX_ENCRYPT_NUM=7 +# default: +CONFIG_ESP_WIFI_MBEDTLS_CRYPTO=y +# default: +CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT=y +# default: +# CONFIG_ESP_WIFI_WAPI_PSK is not set +# default: +# CONFIG_ESP_WIFI_SUITE_B_192 is not set +# default: +# CONFIG_ESP_WIFI_11KV_SUPPORT is not set +# default: +# CONFIG_ESP_WIFI_MBO_SUPPORT is not set +# default: +# CONFIG_ESP_WIFI_DPP_SUPPORT is not set +# default: +# CONFIG_ESP_WIFI_11R_SUPPORT is not set +# default: +# CONFIG_ESP_WIFI_WPS_SOFTAP_REGISTRAR is not set + +# +# WPS Configuration Options +# +# default: +# CONFIG_ESP_WIFI_WPS_STRICT is not set +# default: +# CONFIG_ESP_WIFI_WPS_PASSPHRASE is not set +# default: +# CONFIG_ESP_WIFI_WPS_RECONNECT_ON_FAIL is not set +# end of WPS Configuration Options + +# default: +# CONFIG_ESP_WIFI_DEBUG_PRINT is not set +# default: +CONFIG_ESP_WIFI_ENTERPRISE_SUPPORT=y +# default: +# CONFIG_ESP_WIFI_ENT_FREE_DYNAMIC_BUFFER is not set +# default: +# CONFIG_ESP_WIFI_PASSIVE_HIDDEN_AP_SUPPORT is not set +# end of Wi-Fi + +# +# Core dump +# +# default: +# CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH is not set +# default: +# CONFIG_ESP_COREDUMP_ENABLE_TO_UART is not set +# default: +CONFIG_ESP_COREDUMP_ENABLE_TO_NONE=y +# end of Core dump + +# +# FAT Filesystem support +# +# default: +CONFIG_FATFS_VOLUME_COUNT=2 +# default: +# CONFIG_FATFS_LFN_NONE is not set +# default: +CONFIG_FATFS_LFN_HEAP=y +# default: +# CONFIG_FATFS_LFN_STACK is not set +# default: +# CONFIG_FATFS_SECTOR_512 is not set +# default: +CONFIG_FATFS_SECTOR_4096=y +# default: +# CONFIG_FATFS_CODEPAGE_DYNAMIC is not set +# default: +CONFIG_FATFS_CODEPAGE_437=y +# default: +# CONFIG_FATFS_CODEPAGE_720 is not set +# default: +# CONFIG_FATFS_CODEPAGE_737 is not set +# default: +# CONFIG_FATFS_CODEPAGE_771 is not set +# default: +# CONFIG_FATFS_CODEPAGE_775 is not set +# default: +# CONFIG_FATFS_CODEPAGE_850 is not set +# default: +# CONFIG_FATFS_CODEPAGE_852 is not set +# default: +# CONFIG_FATFS_CODEPAGE_855 is not set +# default: +# CONFIG_FATFS_CODEPAGE_857 is not set +# default: +# CONFIG_FATFS_CODEPAGE_860 is not set +# default: +# CONFIG_FATFS_CODEPAGE_861 is not set +# default: +# CONFIG_FATFS_CODEPAGE_862 is not set +# default: +# CONFIG_FATFS_CODEPAGE_863 is not set +# default: +# CONFIG_FATFS_CODEPAGE_864 is not set +# default: +# CONFIG_FATFS_CODEPAGE_865 is not set +# default: +# CONFIG_FATFS_CODEPAGE_866 is not set +# default: +# CONFIG_FATFS_CODEPAGE_869 is not set +# default: +# CONFIG_FATFS_CODEPAGE_932 is not set +# default: +# CONFIG_FATFS_CODEPAGE_936 is not set +# default: +# CONFIG_FATFS_CODEPAGE_949 is not set +# default: +# CONFIG_FATFS_CODEPAGE_950 is not set +# default: +CONFIG_FATFS_CODEPAGE=437 +# default: +CONFIG_FATFS_MAX_LFN=255 +# default: +CONFIG_FATFS_API_ENCODING_ANSI_OEM=y +# default: +# CONFIG_FATFS_API_ENCODING_UTF_8 is not set +# default: +CONFIG_FATFS_FS_LOCK=0 +# default: +CONFIG_FATFS_TIMEOUT_MS=10000 +# default: +CONFIG_FATFS_PER_FILE_CACHE=y +# default: +CONFIG_FATFS_ALLOC_PREFER_EXTRAM=y +# default: +# CONFIG_FATFS_USE_FASTSEEK is not set +# default: +CONFIG_FATFS_USE_STRFUNC_NONE=y +# default: +# CONFIG_FATFS_USE_STRFUNC_WITHOUT_CRLF_CONV is not set +# default: +# CONFIG_FATFS_USE_STRFUNC_WITH_CRLF_CONV is not set +# default: +CONFIG_FATFS_VFS_FSTAT_BLKSIZE=0 +# default: +# CONFIG_FATFS_IMMEDIATE_FSYNC is not set +# default: +# CONFIG_FATFS_USE_LABEL is not set +# default: +CONFIG_FATFS_LINK_LOCK=y +# default: +CONFIG_FATFS_USE_DYN_BUFFERS=y + +# +# File system free space calculation behavior +# +# default: +CONFIG_FATFS_DONT_TRUST_FREE_CLUSTER_CNT=0 +# default: +CONFIG_FATFS_DONT_TRUST_LAST_ALLOC=0 +# end of File system free space calculation behavior +# end of FAT Filesystem support + +# +# FreeRTOS +# + +# +# Kernel +# +# default: +# CONFIG_FREERTOS_SMP is not set +# default: +# CONFIG_FREERTOS_UNICORE is not set +CONFIG_FREERTOS_HZ=100 +# default: +# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set +# default: +# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set +# default: +CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y +# default: +CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 +# default: +CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536 +# default: +# CONFIG_FREERTOS_USE_IDLE_HOOK is not set +# default: +# CONFIG_FREERTOS_USE_TICK_HOOK is not set +# default: +CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 +# default: +# CONFIG_FREERTOS_ENABLE_BACKWARD_COMPATIBILITY is not set +# default: +CONFIG_FREERTOS_USE_TIMERS=y +# default: +CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME="Tmr Svc" +# default: +# CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU0 is not set +# default: +# CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU1 is not set +# default: +CONFIG_FREERTOS_TIMER_TASK_NO_AFFINITY=y +# default: +CONFIG_FREERTOS_TIMER_SERVICE_TASK_CORE_AFFINITY=0x7FFFFFFF +# default: +CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1 +# default: +CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048 +# default: +CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10 +# default: +CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 +# default: +CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES=1 +# default: +# CONFIG_FREERTOS_USE_TRACE_FACILITY is not set +# default: +# CONFIG_FREERTOS_USE_LIST_DATA_INTEGRITY_CHECK_BYTES is not set +# default: +# CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set +# default: +# CONFIG_FREERTOS_USE_APPLICATION_TASK_TAG is not set +# end of Kernel + +# +# Port +# +# default: +# CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set +# default: +CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS=y +# default: +# CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK is not set +# default: +CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y +# default: +CONFIG_FREERTOS_ISR_STACKSIZE=1536 +# default: +CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y +# default: +# CONFIG_FREERTOS_FPU_IN_ISR is not set +# default: +CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER=y +# default: +CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1=y +# default: +# CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3 is not set +# default: +CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER=y +# default: +# CONFIG_FREERTOS_IN_IRAM is not set +# default: +# CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set +# end of Port + +# +# Extra +# +# default: +CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y +# end of Extra + +# default: +CONFIG_FREERTOS_PORT=y +# default: +CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF +# default: +CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y +# default: +CONFIG_FREERTOS_DEBUG_OCDAWARE=y +# default: +CONFIG_FREERTOS_NUMBER_OF_CORES=2 +# end of FreeRTOS + +# +# Hardware Abstraction Layer (HAL) and Low Level (LL) +# +# default: +CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y +# default: +# CONFIG_HAL_ASSERTION_DISABLE is not set +# default: +# CONFIG_HAL_ASSERTION_SILENT is not set +# default: +# CONFIG_HAL_ASSERTION_ENABLE is not set +# default: +CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=2 +# default: +CONFIG_HAL_WDT_USE_ROM_IMPL=y +# default: +CONFIG_HAL_GPIO_USE_ROM_IMPL=y +# end of Hardware Abstraction Layer (HAL) and Low Level (LL) + +# +# Heap memory debugging +# +# default: +CONFIG_HEAP_POISONING_DISABLED=y +# default: +# CONFIG_HEAP_POISONING_LIGHT is not set +# default: +# CONFIG_HEAP_POISONING_COMPREHENSIVE is not set +# default: +CONFIG_HEAP_TRACING_OFF=y +# default: +# CONFIG_HEAP_TRACING_STANDALONE is not set +# default: +# CONFIG_HEAP_TRACING_TOHOST is not set +# default: +# CONFIG_HEAP_USE_HOOKS is not set +# default: +# CONFIG_HEAP_TASK_TRACKING is not set +# default: +# CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set +# default: +# CONFIG_HEAP_PLACE_FUNCTION_INTO_FLASH is not set +# end of Heap memory debugging + +# +# Log +# +# default: +CONFIG_LOG_VERSION_1=y +# default: +# CONFIG_LOG_VERSION_2 is not set +# default: +CONFIG_LOG_VERSION=1 + +# +# Log Level +# +# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set +# CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set +# CONFIG_LOG_DEFAULT_LEVEL_WARN is not set +CONFIG_LOG_DEFAULT_LEVEL_INFO=y +# CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set +# CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set +# default: +CONFIG_LOG_DEFAULT_LEVEL=3 +# default: +CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y +# default: +# CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set +# default: +# CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set +# default: +CONFIG_LOG_MAXIMUM_LEVEL=3 + +# +# Level Settings +# +# default: +# CONFIG_LOG_MASTER_LEVEL is not set +# default: +CONFIG_LOG_DYNAMIC_LEVEL_CONTROL=y +# default: +# CONFIG_LOG_TAG_LEVEL_IMPL_NONE is not set +# default: +# CONFIG_LOG_TAG_LEVEL_IMPL_LINKED_LIST is not set +# default: +CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_AND_LINKED_LIST=y +# default: +# CONFIG_LOG_TAG_LEVEL_CACHE_ARRAY is not set +# default: +CONFIG_LOG_TAG_LEVEL_CACHE_BINARY_MIN_HEAP=y +# default: +CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_SIZE=31 +# end of Level Settings +# end of Log Level + +# +# Format +# +# default: +# CONFIG_LOG_COLORS is not set +# default: +CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y +# default: +# CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set +# end of Format + +# +# Settings +# +# default: +CONFIG_LOG_MODE_TEXT_EN=y +# default: +CONFIG_LOG_MODE_TEXT=y +# end of Settings + +# default: +CONFIG_LOG_IN_IRAM=y +# end of Log + +# +# LWIP +# +# default: +CONFIG_LWIP_ENABLE=y +# default: +CONFIG_LWIP_LOCAL_HOSTNAME="espressif" +# default: +CONFIG_LWIP_TCPIP_TASK_PRIO=18 +# default: +# CONFIG_LWIP_TCPIP_CORE_LOCKING is not set +# default: +# CONFIG_LWIP_CHECK_THREAD_SAFETY is not set +# default: +CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y +# default: +# CONFIG_LWIP_L2_TO_L3_COPY is not set +# default: +# CONFIG_LWIP_IRAM_OPTIMIZATION is not set +# default: +# CONFIG_LWIP_EXTRA_IRAM_OPTIMIZATION is not set +# default: +CONFIG_LWIP_TIMERS_ONDEMAND=y +# default: +CONFIG_LWIP_ND6=y +# default: +# CONFIG_LWIP_FORCE_ROUTER_FORWARDING is not set +# default: +CONFIG_LWIP_MAX_SOCKETS=10 +# default: +# CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set +# default: +# CONFIG_LWIP_SO_LINGER is not set +# default: +CONFIG_LWIP_SO_REUSE=y +# default: +CONFIG_LWIP_SO_REUSE_RXTOALL=y +# default: +# CONFIG_LWIP_SO_RCVBUF is not set +# default: +# CONFIG_LWIP_NETBUF_RECVINFO is not set +# default: +CONFIG_LWIP_IP_DEFAULT_TTL=64 +# default: +CONFIG_LWIP_IP4_FRAG=y +# default: +CONFIG_LWIP_IP6_FRAG=y +# default: +# CONFIG_LWIP_IP4_REASSEMBLY is not set +# default: +# CONFIG_LWIP_IP6_REASSEMBLY is not set +# default: +CONFIG_LWIP_IP_REASS_MAX_PBUFS=10 +# default: +CONFIG_LWIP_IPV6_DUP_DETECT_ATTEMPTS=1 +# default: +# CONFIG_LWIP_IP_FORWARD is not set +# default: +# CONFIG_LWIP_STATS is not set +# default: +CONFIG_LWIP_ESP_GRATUITOUS_ARP=y +# default: +CONFIG_LWIP_GARP_TMR_INTERVAL=60 +# default: +CONFIG_LWIP_ESP_MLDV6_REPORT=y +# default: +CONFIG_LWIP_MLDV6_TMR_INTERVAL=40 +# default: +CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32 +# default: +CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y +# default: +# CONFIG_LWIP_DHCP_DOES_ACD_CHECK is not set +# default: +# CONFIG_LWIP_DHCP_DOES_NOT_CHECK_OFFERED_IP is not set +# default: +# CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set +# default: +CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID=y +# default: +# CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set +# default: +CONFIG_LWIP_DHCP_OPTIONS_LEN=69 +# default: +CONFIG_LWIP_NUM_NETIF_CLIENT_DATA=0 +# default: +CONFIG_LWIP_DHCP_COARSE_TIMER_SECS=1 + +# +# DHCP server +# +# default: +CONFIG_LWIP_DHCPS=y +# default: +CONFIG_LWIP_DHCPS_REPORT_CLIENT_HOSTNAME=y +# default: +CONFIG_LWIP_DHCPS_LEASE_UNIT=60 +# default: +CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8 +# default: +CONFIG_LWIP_DHCPS_MAX_HOSTNAME_LEN=64 +# default: +CONFIG_LWIP_DHCPS_STATIC_ENTRIES=y +# end of DHCP server + +# default: +# CONFIG_LWIP_AUTOIP is not set +# default: +CONFIG_LWIP_IPV4=y +# default: +CONFIG_LWIP_IPV6=y +# default: +# CONFIG_LWIP_IPV6_AUTOCONFIG is not set +# default: +CONFIG_LWIP_IPV6_NUM_ADDRESSES=3 +# default: +# CONFIG_LWIP_IPV6_FORWARD is not set +# default: +# CONFIG_LWIP_NETIF_STATUS_CALLBACK is not set +# default: +# CONFIG_LWIP_NETIF_LINK_CALLBACK is not set +# default: +CONFIG_LWIP_NETIF_LOOPBACK=y +# default: +CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 + +# +# TCP +# +# default: +CONFIG_LWIP_MAX_ACTIVE_TCP=16 +# default: +CONFIG_LWIP_MAX_LISTENING_TCP=16 +# default: +CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION=y +# default: +CONFIG_LWIP_TCP_MAXRTX=12 +# default: +CONFIG_LWIP_TCP_SYNMAXRTX=12 +# default: +CONFIG_LWIP_TCP_MSS=1440 +# default: +CONFIG_LWIP_TCP_TMR_INTERVAL=250 +# default: +CONFIG_LWIP_TCP_MSL=60000 +# default: +CONFIG_LWIP_TCP_FIN_WAIT_TIMEOUT=20000 +# default: +CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5760 +# default: +CONFIG_LWIP_TCP_WND_DEFAULT=5760 +# default: +CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 +# default: +CONFIG_LWIP_TCP_ACCEPTMBOX_SIZE=6 +# default: +CONFIG_LWIP_TCP_QUEUE_OOSEQ=y +# default: +CONFIG_LWIP_TCP_OOSEQ_TIMEOUT=6 +# default: +CONFIG_LWIP_TCP_OOSEQ_MAX_PBUFS=4 +# default: +# CONFIG_LWIP_TCP_SACK_OUT is not set +# default: +CONFIG_LWIP_TCP_OVERSIZE_MSS=y +# default: +# CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set +# default: +# CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set +# default: +CONFIG_LWIP_TCP_RTO_TIME=1500 +# end of TCP + +# +# UDP +# +# default: +CONFIG_LWIP_MAX_UDP_PCBS=16 +# default: +CONFIG_LWIP_UDP_RECVMBOX_SIZE=6 +# end of UDP + +# +# Checksums +# +# default: +# CONFIG_LWIP_CHECKSUM_CHECK_IP is not set +# default: +# CONFIG_LWIP_CHECKSUM_CHECK_UDP is not set +# default: +CONFIG_LWIP_CHECKSUM_CHECK_ICMP=y +# end of Checksums + +# default: +CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 +# default: +CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y +# default: +# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set +# default: +# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set +# default: +CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF +# default: +CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3 +# default: +CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5 +# default: +CONFIG_LWIP_IPV6_ND6_NUM_PREFIXES=5 +# default: +CONFIG_LWIP_IPV6_ND6_NUM_ROUTERS=3 +# default: +CONFIG_LWIP_IPV6_ND6_NUM_DESTINATIONS=10 +# default: +# CONFIG_LWIP_IPV6_ND6_ROUTE_INFO_OPTION_SUPPORT is not set +# default: +# CONFIG_LWIP_PPP_SUPPORT is not set +# default: +# CONFIG_LWIP_SLIP_SUPPORT is not set + +# +# ICMP +# +# default: +CONFIG_LWIP_ICMP=y +# default: +# CONFIG_LWIP_MULTICAST_PING is not set +# default: +# CONFIG_LWIP_BROADCAST_PING is not set +# end of ICMP + +# +# LWIP RAW API +# +# default: +CONFIG_LWIP_MAX_RAW_PCBS=16 +# end of LWIP RAW API + +# +# SNTP +# +# default: +CONFIG_LWIP_SNTP_MAX_SERVERS=1 +# default: +# CONFIG_LWIP_DHCP_GET_NTP_SRV is not set +# default: +CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000 +# default: +CONFIG_LWIP_SNTP_STARTUP_DELAY=y +# default: +CONFIG_LWIP_SNTP_MAXIMUM_STARTUP_DELAY=5000 +# end of SNTP + +# +# DNS +# +# default: +CONFIG_LWIP_DNS_MAX_HOST_IP=1 +# default: +CONFIG_LWIP_DNS_MAX_SERVERS=3 +# default: +# CONFIG_LWIP_FALLBACK_DNS_SERVER_SUPPORT is not set +# default: +# CONFIG_LWIP_DNS_SETSERVER_WITH_NETIF is not set +# default: +# CONFIG_LWIP_USE_ESP_GETADDRINFO is not set +# end of DNS + +# default: +CONFIG_LWIP_BRIDGEIF_MAX_PORTS=7 +# default: +CONFIG_LWIP_ESP_LWIP_ASSERT=y + +# +# Hooks +# +# default: +# CONFIG_LWIP_HOOK_TCP_ISN_NONE is not set +# default: +CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y +# default: +# CONFIG_LWIP_HOOK_TCP_ISN_CUSTOM is not set +# default: +CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y +# default: +# CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT is not set +# default: +# CONFIG_LWIP_HOOK_IP6_ROUTE_CUSTOM is not set +# default: +CONFIG_LWIP_HOOK_ND6_GET_GW_NONE=y +# default: +# CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT is not set +# default: +# CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM is not set +# default: +CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_NONE=y +# default: +# CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_DEFAULT is not set +# default: +# CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_CUSTOM is not set +# default: +CONFIG_LWIP_HOOK_DHCP_EXTRA_OPTION_NONE=y +# default: +# CONFIG_LWIP_HOOK_DHCP_EXTRA_OPTION_DEFAULT is not set +# default: +# CONFIG_LWIP_HOOK_DHCP_EXTRA_OPTION_CUSTOM is not set +# default: +CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y +# default: +# CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT is not set +# default: +# CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set +# default: +CONFIG_LWIP_HOOK_DNS_EXT_RESOLVE_NONE=y +# default: +# CONFIG_LWIP_HOOK_DNS_EXT_RESOLVE_CUSTOM is not set +# default: +# CONFIG_LWIP_HOOK_IP6_INPUT_NONE is not set +# default: +CONFIG_LWIP_HOOK_IP6_INPUT_DEFAULT=y +# default: +# CONFIG_LWIP_HOOK_IP6_INPUT_CUSTOM is not set +# end of Hooks + +# default: +# CONFIG_LWIP_DEBUG is not set +# end of LWIP + +# +# mbedTLS +# + +# +# Core Configuration +# +# default: +CONFIG_MBEDTLS_VER_4_X_SUPPORT=y +# default: +# CONFIG_MBEDTLS_COMPILER_OPTIMIZATION_NONE is not set +# default: +CONFIG_MBEDTLS_COMPILER_OPTIMIZATION_SIZE=y +# default: +# CONFIG_MBEDTLS_COMPILER_OPTIMIZATION_PERF is not set +# default: +CONFIG_MBEDTLS_FS_IO=y +# default: +CONFIG_MBEDTLS_THREADING_C=y +# default: +# CONFIG_MBEDTLS_THREADING_ALT is not set +# default: +CONFIG_MBEDTLS_THREADING_PTHREAD=y +# default: +CONFIG_MBEDTLS_ERROR_STRINGS=y +# default: +CONFIG_MBEDTLS_VERSION_C=y +# default: +CONFIG_MBEDTLS_HAVE_TIME=y +# default: +# CONFIG_MBEDTLS_PLATFORM_TIME_ALT is not set +# default: +# CONFIG_MBEDTLS_HAVE_TIME_DATE is not set +# default: +CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y +# default: +# CONFIG_MBEDTLS_EXTERNAL_MEM_ALLOC is not set +# default: +# CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set +# default: +# CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set +# default: +CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y +# default: +CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 +# default: +CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 +# default: +# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set +# default: +# CONFIG_MBEDTLS_VERSION_FEATURES is not set +# default: +# CONFIG_MBEDTLS_DEBUG is not set +# default: +CONFIG_MBEDTLS_SELF_TEST=y +# end of Core Configuration + +# +# Certificates +# +# default: +CONFIG_MBEDTLS_X509_USE_C=y +# default: +CONFIG_MBEDTLS_PEM_PARSE_C=y +# default: +CONFIG_MBEDTLS_PEM_WRITE_C=y +# default: +CONFIG_MBEDTLS_PK_C=y +# default: +CONFIG_MBEDTLS_PK_PARSE_C=y +# default: +CONFIG_MBEDTLS_PK_WRITE_C=y +# default: +# CONFIG_MBEDTLS_X509_REMOVE_INFO is not set +# default: +CONFIG_MBEDTLS_X509_CRL_PARSE_C=y +# default: +CONFIG_MBEDTLS_X509_CRT_PARSE_C=y +# default: +CONFIG_MBEDTLS_X509_CSR_PARSE_C=y +# default: +# CONFIG_MBEDTLS_X509_CREATE_C is not set +# default: +CONFIG_MBEDTLS_X509_RSASSA_PSS_SUPPORT=y +# default: +# CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set +# default: +CONFIG_MBEDTLS_ASN1_PARSE_C=y +# default: +CONFIG_MBEDTLS_ASN1_WRITE_C=y +# default: +CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y + +# +# Certificate Bundle Configuration +# +# default: +CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y +# default: +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set +# default: +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set +# default: +# CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set +# default: +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEPRECATED_LIST is not set +# default: +CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS=200 +# end of Certificate Bundle Configuration + +# default: +# CONFIG_MBEDTLS_ALLOW_WEAK_CERTIFICATE_VERIFICATION is not set +# default: +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_CROSS_SIGNED_VERIFY is not set +# end of Certificates + +# default: +CONFIG_MBEDTLS_TLS_ENABLED=y + +# +# TLS Protocol Configuration +# +# default: +CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y +# default: +# CONFIG_MBEDTLS_SSL_PROTO_TLS1_3 is not set +# default: +# CONFIG_MBEDTLS_SSL_PROTO_GMTSSL1_1 is not set +# default: +CONFIG_MBEDTLS_TLS_SERVER=y +# default: +CONFIG_MBEDTLS_TLS_CLIENT=y +# default: +CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y +# default: +# CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set +# default: +# CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set +# default: +# CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE is not set +# default: +# CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set +# default: +CONFIG_MBEDTLS_SSL_CACHE_C=y +# default: +CONFIG_MBEDTLS_SSL_ALL_ALERT_MESSAGES=y + +# +# TLS Key Exchange Configuration +# +# default: +# CONFIG_MBEDTLS_PSK_MODES is not set +# default: +CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y +# default: +CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y +# default: +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y +# default: +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y +# end of TLS Key Exchange Configuration + +# default: +CONFIG_MBEDTLS_SSL_SERVER_NAME_INDICATION=y +# default: +CONFIG_MBEDTLS_SSL_ALPN=y +# default: +CONFIG_MBEDTLS_SSL_MAX_FRAGMENT_LENGTH=y +# default: +# CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set +# default: +CONFIG_MBEDTLS_SSL_RENEGOTIATION=y +# default: +CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +# default: +CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y +# default: +# CONFIG_MBEDTLS_SSL_KEYING_MATERIAL_EXPORT is not set +# end of TLS Protocol Configuration + +# default: +# CONFIG_MBEDTLS_SSL_PROTO_DTLS is not set + +# +# Symmetric Ciphers +# +# default: +CONFIG_MBEDTLS_AES_C=y +# default: +# CONFIG_MBEDTLS_CAMELLIA_C is not set +# default: +# CONFIG_MBEDTLS_ARIA_C is not set +# default: +# CONFIG_MBEDTLS_DES_C is not set +# default: +CONFIG_MBEDTLS_CCM_C=y +# default: +CONFIG_MBEDTLS_CIPHER_MODE_CBC=y +# default: +CONFIG_MBEDTLS_CIPHER_MODE_CFB=y +# default: +CONFIG_MBEDTLS_CIPHER_MODE_CTR=y +# default: +CONFIG_MBEDTLS_CIPHER_MODE_OFB=y +# default: +CONFIG_MBEDTLS_CIPHER_MODE_XTS=y +# default: +CONFIG_MBEDTLS_GCM_C=y +# default: +# CONFIG_MBEDTLS_NIST_KW_C is not set +# default: +CONFIG_MBEDTLS_AES_ROM_TABLES=y +# default: +# CONFIG_MBEDTLS_AES_FEWER_TABLES is not set +# default: +# CONFIG_MBEDTLS_AES_ONLY_128_BIT_KEY_LENGTH is not set +# default: +CONFIG_MBEDTLS_CMAC_C=y +# end of Symmetric Ciphers + +# +# Asymmetric Ciphers +# +# default: +CONFIG_MBEDTLS_RSA_C=y +# default: +CONFIG_MBEDTLS_ECP_C=y + +# +# Supported Curves +# +# default: +CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y +# end of Supported Curves + +# +# Elliptic Curve Ciphers Configuration +# +# default: +CONFIG_MBEDTLS_ECP_NIST_OPTIM=y +# default: +# CONFIG_MBEDTLS_ECP_FIXED_POINT_OPTIM is not set +# default: +# CONFIG_MBEDTLS_DHM_C is not set +# default: +CONFIG_MBEDTLS_ECDH_C=y +# default: +# CONFIG_MBEDTLS_ECJPAKE_C is not set +# default: +CONFIG_MBEDTLS_ECDSA_C=y +# default: +CONFIG_MBEDTLS_PK_PARSE_EC_EXTENDED=y +# default: +CONFIG_MBEDTLS_PK_PARSE_EC_COMPRESSED=y +# default: +CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y +# default: +# CONFIG_MBEDTLS_ECP_RESTARTABLE is not set +# end of Elliptic Curve Ciphers Configuration +# end of Asymmetric Ciphers + +# +# Hash functions +# +# default: +# CONFIG_MBEDTLS_RIPEMD160_C is not set +# default: +CONFIG_MBEDTLS_MD_C=y +# default: +CONFIG_MBEDTLS_MD5_C=y +# default: +CONFIG_MBEDTLS_SHA1_C=y +# default: +# CONFIG_MBEDTLS_SHA224_C is not set +# default: +CONFIG_MBEDTLS_SHA256_C=y +# default: +CONFIG_MBEDTLS_SHA384_C=y +# default: +CONFIG_MBEDTLS_SHA512_C=y +# default: +# CONFIG_MBEDTLS_SHA3_C is not set +# default: +CONFIG_MBEDTLS_ROM_MD5=y +# end of Hash functions + +# +# Hardware Acceleration +# +# default: +CONFIG_MBEDTLS_HARDWARE_SHA=y +# default: +CONFIG_MBEDTLS_HARDWARE_MPI=y +# default: +CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI=y +# default: +CONFIG_MBEDTLS_MPI_USE_INTERRUPT=y +# default: +CONFIG_MBEDTLS_MPI_INTERRUPT_LEVEL=0 +# default: +CONFIG_MBEDTLS_HARDWARE_AES=y +# default: +# CONFIG_MBEDTLS_AES_SOFT_FALLBACK is not set +# default: +CONFIG_MBEDTLS_GCM_SUPPORT_NON_AES_CIPHER=y +# default: +CONFIG_MBEDTLS_AES_USE_INTERRUPT=y +# default: +CONFIG_MBEDTLS_AES_INTERRUPT_LEVEL=0 +# default: +CONFIG_MBEDTLS_AES_HW_SMALL_DATA_LEN_OPTIM=y +# default: +# CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set +# default: +# CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set +# default: +CONFIG_MBEDTLS_HARDWARE_RSA_DS_PERIPHERAL=y +# end of Hardware Acceleration + +# +# Entropy and Random Number Generation +# +# default: +# CONFIG_MBEDTLS_ENTROPY_FORCE_SHA256 is not set +# default: +CONFIG_MBEDTLS_CTR_DRBG_C=y +# default: +CONFIG_MBEDTLS_HMAC_DRBG_C=y +# end of Entropy and Random Number Generation + +# +# Encoding/Decoding +# +# default: +CONFIG_MBEDTLS_BASE64_C=y +# default: +CONFIG_MBEDTLS_PKCS5_C=y +# default: +CONFIG_MBEDTLS_PKCS7_C=y +# default: +CONFIG_MBEDTLS_PKCS1_V15=y +# default: +CONFIG_MBEDTLS_PKCS1_V21=y +# end of Encoding/Decoding + +# +# Stream Cipher +# +# default: +# CONFIG_MBEDTLS_CHACHA20_C is not set +# end of Stream Cipher +# end of mbedTLS + +# +# NVS +# +# default: +# CONFIG_NVS_ENCRYPTION is not set +# default: +# CONFIG_NVS_ASSERT_ERROR_CHECK is not set +# default: +# CONFIG_NVS_LEGACY_DUP_KEYS_COMPATIBILITY is not set +# default: +# CONFIG_NVS_ALLOCATE_CACHE_IN_SPIRAM is not set +# default: +# CONFIG_NVS_BDL_STACK is not set +# default: +# CONFIG_NVS_FLASH_VERIFY_ERASE is not set +# end of NVS + +# +# OpenThread +# +# default: +# CONFIG_OPENTHREAD_ENABLED is not set + +# +# OpenThread Spinel +# +# default: +# CONFIG_OPENTHREAD_SPINEL_ONLY is not set +# end of OpenThread Spinel + +# default: +# CONFIG_OPENTHREAD_DEBUG is not set +# end of OpenThread + +# +# Protocomm +# +# default: +# CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_0 is not set +# default: +# CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_1 is not set +# default: +CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_2=y +# default: +CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_PATCH_VERSION=y +# end of Protocomm + +# +# PThreads +# +# default: +CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5 +# default: +CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 +# default: +CONFIG_PTHREAD_STACK_MIN=768 +# default: +CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY=y +# default: +# CONFIG_PTHREAD_DEFAULT_CORE_0 is not set +# default: +# CONFIG_PTHREAD_DEFAULT_CORE_1 is not set +# default: +CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1 +# default: +CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread" +# end of PThreads + +# +# SD Protocol Layer Configuration +# +# default: +CONFIG_SD_ENABLE_SDIO_SUPPORT=y +# end of SD Protocol Layer Configuration + +# +# MMU Config +# +# default: +CONFIG_MMU_PAGE_SIZE_64KB=y +# default: +CONFIG_MMU_PAGE_MODE="64KB" +# default: +CONFIG_MMU_PAGE_SIZE=0x10000 +# end of MMU Config + +# +# Main Flash configuration +# + +# +# SPI Flash behavior when brownout +# +# default: +CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC=y +# default: +CONFIG_SPI_FLASH_BROWNOUT_RESET=y +# end of SPI Flash behavior when brownout + +# +# Optional and Experimental Features (READ DOCS FIRST) +# + +# +# Features here require specific hardware (READ DOCS FIRST!) +# +# default: +# CONFIG_SPI_FLASH_HPM_ENA is not set +# default: +CONFIG_SPI_FLASH_HPM_AUTO=y +# default: +# CONFIG_SPI_FLASH_HPM_DIS is not set +# default: +CONFIG_SPI_FLASH_HPM_ON=y +# default: +CONFIG_SPI_FLASH_HPM_DC_AUTO=y +# default: +# CONFIG_SPI_FLASH_HPM_DC_DISABLE is not set +# default: +# CONFIG_SPI_FLASH_AUTO_SUSPEND is not set +# default: +CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US=50 +# default: +# CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND is not set +# default: +# CONFIG_SPI_FLASH_FORCE_ENABLE_C6_H2_SUSPEND is not set +# default: +CONFIG_SPI_FLASH_PLACE_FUNCTIONS_IN_IRAM=y +# end of Optional and Experimental Features (READ DOCS FIRST) +# end of Main Flash configuration + +# +# SPI Flash driver +# +# default: +# CONFIG_SPI_FLASH_VERIFY_WRITE is not set +# default: +# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set +# default: +# CONFIG_SPI_FLASH_ROM_IMPL is not set +# default: +CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y +# default: +# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set +# default: +# CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set +# default: +# CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set +# default: +CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y +# default: +CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20 +# default: +CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 +# default: +CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192 +# default: +# CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set +# default: +# CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set +# default: +# CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set + +# +# Auto-detect flash chips +# +# default: +CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_VENDOR_GD_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_VENDOR_ISSI_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_VENDOR_MXIC_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_VENDOR_WINBOND_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_VENDOR_BOYA_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_VENDOR_TH_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y +# default: +CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y +# default: +CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y +# default: +CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y +# default: +CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP=y +# default: +CONFIG_SPI_FLASH_SUPPORT_TH_CHIP=y +# default: +CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP=y +# end of Auto-detect flash chips + +# default: +CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y +# end of SPI Flash driver + +# +# SPIFFS Configuration +# +# default: +CONFIG_SPIFFS_MAX_PARTITIONS=3 + +# +# SPIFFS Cache Configuration +# +# default: +CONFIG_SPIFFS_CACHE=y +# default: +CONFIG_SPIFFS_CACHE_WR=y +# default: +# CONFIG_SPIFFS_CACHE_STATS is not set +# end of SPIFFS Cache Configuration + +# default: +CONFIG_SPIFFS_PAGE_CHECK=y +# default: +CONFIG_SPIFFS_GC_MAX_RUNS=10 +# default: +# CONFIG_SPIFFS_GC_STATS is not set +# default: +CONFIG_SPIFFS_PAGE_SIZE=256 +# default: +CONFIG_SPIFFS_OBJ_NAME_LEN=32 +# default: +# CONFIG_SPIFFS_FOLLOW_SYMLINKS is not set +# default: +CONFIG_SPIFFS_USE_MAGIC=y +# default: +CONFIG_SPIFFS_USE_MAGIC_LENGTH=y +# default: +CONFIG_SPIFFS_META_LENGTH=4 +# default: +CONFIG_SPIFFS_USE_MTIME=y + +# +# Debug Configuration +# +# default: +# CONFIG_SPIFFS_DBG is not set +# default: +# CONFIG_SPIFFS_API_DBG is not set +# default: +# CONFIG_SPIFFS_GC_DBG is not set +# default: +# CONFIG_SPIFFS_CACHE_DBG is not set +# default: +# CONFIG_SPIFFS_CHECK_DBG is not set +# default: +# CONFIG_SPIFFS_TEST_VISUALISATION is not set +# end of Debug Configuration +# end of SPIFFS Configuration + +# +# TCP Transport +# + +# +# Websocket +# +# default: +CONFIG_WS_TRANSPORT=y +# default: +CONFIG_WS_BUFFER_SIZE=1024 +# default: +# CONFIG_WS_DYNAMIC_BUFFER is not set +# end of Websocket +# end of TCP Transport + +# +# Ultra Low Power (ULP) Co-processor +# +# default: +# CONFIG_ULP_COPROC_ENABLED is not set + +# +# ULP Debugging Options +# +# end of ULP Debugging Options +# end of Ultra Low Power (ULP) Co-processor + +# +# Unity unit testing library +# +# default: +CONFIG_UNITY_ENABLE_FLOAT=y +# default: +CONFIG_UNITY_ENABLE_DOUBLE=y +# default: +# CONFIG_UNITY_ENABLE_64BIT is not set +# default: +# CONFIG_UNITY_ENABLE_COLOR is not set +# default: +CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y +# default: +# CONFIG_UNITY_ENABLE_FIXTURE is not set +# default: +# CONFIG_UNITY_ENABLE_BACKTRACE_ON_FAIL is not set +# end of Unity unit testing library + +# +# Virtual file system +# +# default: +CONFIG_VFS_SUPPORT_IO=y +# default: +CONFIG_VFS_SUPPORT_DIR=y +# default: +CONFIG_VFS_SUPPORT_SELECT=y +# default: +CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y +# default: +# CONFIG_VFS_SELECT_IN_RAM is not set +# default: +# CONFIG_VFS_SUPPORT_TERMIOS is not set +# default: +CONFIG_VFS_MAX_COUNT=8 +# default: +# CONFIG_VFS_SUPPRESS_CTX_DEPRECATION is not set + +# +# Host File System I/O (Semihosting) +# +# default: +CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1 +# end of Host File System I/O (Semihosting) + +# default: +CONFIG_VFS_INITIALIZE_DEV_NULL=y +# end of Virtual file system + +# +# Wear Levelling +# +# default: +# CONFIG_WL_SECTOR_SIZE_512 is not set +# default: +CONFIG_WL_SECTOR_SIZE_4096=y +# default: +CONFIG_WL_SECTOR_SIZE=4096 +# end of Wear Levelling + +CONFIG_CHERRYUSB=y +# default: +# CONFIG_CHERRYUSB_DEVICE is not set +CONFIG_CHERRYUSB_HOST=y +# default: +CONFIG_CHERRYUSB_HOST_CUSTOM=y +# default: +# CONFIG_CHERRYUSB_HOST_EHCI_BL is not set +# default: +# CONFIG_CHERRYUSB_HOST_EHCI_HPM is not set +# default: +# CONFIG_CHERRYUSB_HOST_EHCI_AIC is not set +# default: +# CONFIG_CHERRYUSB_HOST_EHCI_MCX is not set +# default: +# CONFIG_CHERRYUSB_HOST_EHCI_NUC980 is not set +# default: +# CONFIG_CHERRYUSB_HOST_EHCI_MA35D0 is not set +# default: +# CONFIG_CHERRYUSB_HOST_EHCI_CUSTOM is not set +# default: +# CONFIG_CHERRYUSB_HOST_DWC2_ST is not set +# default: +# CONFIG_CHERRYUSB_HOST_DWC2_ESP is not set +# default: +# CONFIG_CHERRYUSB_HOST_DWC2_KENDRYTE is not set +# default: +# CONFIG_CHERRYUSB_HOST_DWC2_INFINEON is not set +# default: +# CONFIG_CHERRYUSB_HOST_DWC2_AT is not set +# default: +# CONFIG_CHERRYUSB_HOST_DWC2_HC is not set +# default: +# CONFIG_CHERRYUSB_HOST_DWC2_NATION is not set +# default: +# CONFIG_CHERRYUSB_HOST_DWC2_CUSTOM is not set +# default: +# CONFIG_CHERRYUSB_HOST_MUSB_ES is not set +# default: +# CONFIG_CHERRYUSB_HOST_MUSB_SUNXI is not set +# default: +# CONFIG_CHERRYUSB_HOST_MUSB_BK is not set +# default: +# CONFIG_CHERRYUSB_HOST_MUSB_SIFLI is not set +# default: +# CONFIG_CHERRYUSB_HOST_MUSB_CUSTOM is not set +# default: +# CONFIG_CHERRYUSB_HOST_PUSB2 is not set +# default: +# CONFIG_CHERRYUSB_HOST_XHCI_PHYTIUM is not set +# default: +# CONFIG_CHERRYUSB_HOST_XHCI_CUSTOM is not set +# default: +# CONFIG_CHERRYUSB_HOST_KINETIS_MCX is not set +# default: +# CONFIG_CHERRYUSB_HOST_KINETIS_MM32 is not set +# default: +# CONFIG_CHERRYUSB_HOST_KINETIS_CUSTOM is not set +# default: +# CONFIG_CHERRYUSB_HOST_RP2040 is not set +CONFIG_CHERRYUSB_HOST_CDC_ACM=y +# default: +# CONFIG_CHERRYUSB_HOST_HID is not set +# default: +# CONFIG_CHERRYUSB_HOST_MSC is not set +# default: +# CONFIG_CHERRYUSB_HOST_CDC_ECM is not set +# default: +# CONFIG_CHERRYUSB_HOST_CDC_RNDIS is not set +# default: +# CONFIG_CHERRYUSB_HOST_CDC_NCM is not set +# default: +# CONFIG_CHERRYUSB_HOST_VIDEO is not set +# default: +# CONFIG_CHERRYUSB_HOST_AUDIO is not set +# default: +# CONFIG_CHERRYUSB_HOST_ASIX is not set +# default: +# CONFIG_CHERRYUSB_HOST_RTL8152 is not set +CONFIG_CHERRYUSB_HOST_FTDI=y +CONFIG_CHERRYUSB_HOST_CH34X=y +CONFIG_CHERRYUSB_HOST_CP210X=y +CONFIG_CHERRYUSB_HOST_PL2303=y +# default: +# CONFIG_CHERRYUSB_HOST_GSM is not set +# default: +# CONFIG_CHERRYUSB_HOST_AOA is not set +# default: +CONFIG_USBHOST_SERIAL=y +# default: +CONFIG_USBHOST_PSC_PRIO=0 +# default: +CONFIG_USBHOST_PSC_STACKSIZE=4096 +# default: +CONFIG_USBHOST_REQUEST_BUFFER_LEN=512 +# default: +CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT=500 +# default: +CONFIG_USBHOST_SERIAL_RX_SIZE=2048 + +# +# Select USB host template, please select class driver first +# +# default: +# CONFIG_TEST_USBH_SERIAL is not set +# end of Select USB host template, please select class driver first +# end of Component config + +# default: +# CONFIG_IDF_EXPERIMENTAL_FEATURES is not set + +# Deprecated options for backward compatibility +# CONFIG_APP_BUILD_TYPE_ELF_RAM is not set +# CONFIG_NO_BLOBS is not set +# CONFIG_APP_ROLLBACK_ENABLE is not set +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set +CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y +# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set +CONFIG_LOG_BOOTLOADER_LEVEL=3 +# CONFIG_FLASH_ENCRYPTION_ENABLED is not set +# CONFIG_FLASHMODE_QIO is not set +# CONFIG_FLASHMODE_QOUT is not set +CONFIG_FLASHMODE_DIO=y +# CONFIG_FLASHMODE_DOUT is not set +CONFIG_MONITOR_BAUD=115200 +# CONFIG_OPTIMIZATION_LEVEL_DEBUG is not set +# CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG is not set +# CONFIG_COMPILER_OPTIMIZATION_DEFAULT is not set +# CONFIG_OPTIMIZATION_LEVEL_RELEASE is not set +# CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE is not set +CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y +# CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set +# CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set +CONFIG_OPTIMIZATION_ASSERTION_LEVEL=2 +# CONFIG_CXX_EXCEPTIONS is not set +CONFIG_STACK_CHECK_NONE=y +# CONFIG_STACK_CHECK_NORM is not set +# CONFIG_STACK_CHECK_STRONG is not set +# CONFIG_STACK_CHECK_ALL is not set +# CONFIG_WARN_WRITE_STRINGS is not set +# CONFIG_BLUEDROID_ENABLED is not set +CONFIG_NIMBLE_ENABLED=y +CONFIG_NIMBLE_MEM_ALLOC_MODE_INTERNAL=y +# CONFIG_NIMBLE_MEM_ALLOC_MODE_EXTERNAL is not set +# CONFIG_NIMBLE_MEM_ALLOC_MODE_DEFAULT is not set +CONFIG_NIMBLE_PINNED_TO_CORE=0 +CONFIG_NIMBLE_PINNED_TO_CORE_0=y +# CONFIG_NIMBLE_PINNED_TO_CORE_1 is not set +CONFIG_NIMBLE_TASK_STACK_SIZE=4096 +CONFIG_BT_NIMBLE_TASK_STACK_SIZE=4096 +CONFIG_NIMBLE_ROLE_CENTRAL=y +CONFIG_NIMBLE_ROLE_PERIPHERAL=y +CONFIG_NIMBLE_ROLE_BROADCASTER=y +CONFIG_NIMBLE_ROLE_OBSERVER=y +CONFIG_NIMBLE_SM_LEGACY=y +CONFIG_NIMBLE_SM_SC=y +# CONFIG_NIMBLE_SM_SC_DEBUG_KEYS is not set +CONFIG_BT_NIMBLE_SM_SC_LVL=0 +# CONFIG_NIMBLE_NVS_PERSIST is not set +CONFIG_NIMBLE_MAX_BONDS=1 +CONFIG_NIMBLE_RPA_TIMEOUT=900 +CONFIG_NIMBLE_MAX_CONNECTIONS=1 +CONFIG_NIMBLE_MAX_CCCDS=8 +# CONFIG_NIMBLE_CRYPTO_STACK_MBEDTLS is not set +# CONFIG_NIMBLE_HS_FLOW_CTRL is not set +CONFIG_NIMBLE_ATT_PREFERRED_MTU=255 +CONFIG_NIMBLE_L2CAP_COC_MAX_NUM=0 +CONFIG_BT_NIMBLE_MSYS1_BLOCK_COUNT=12 +CONFIG_BT_NIMBLE_ACL_BUF_COUNT=24 +CONFIG_BT_NIMBLE_ACL_BUF_SIZE=255 +CONFIG_BT_NIMBLE_HCI_EVT_BUF_SIZE=70 +CONFIG_BT_NIMBLE_HCI_EVT_HI_BUF_COUNT=30 +CONFIG_BT_NIMBLE_HCI_EVT_LO_BUF_COUNT=8 +CONFIG_NIMBLE_SVC_GAP_DEVICE_NAME="Velxio-Deployer" +CONFIG_NIMBLE_GAP_DEVICE_NAME_MAX_LEN=31 +CONFIG_NIMBLE_SVC_GAP_APPEARANCE=0x0 +# CONFIG_NIMBLE_MESH is not set +# CONFIG_NIMBLE_DEBUG is not set +# CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EN is not set +CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_DIS=y +CONFIG_SW_COEXIST_ENABLE=y +CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE=y +CONFIG_ESP_WIFI_SW_COEXIST_ENABLE=y +# CONFIG_CAM_CTLR_DVP_CAM_ISR_IRAM_SAFE is not set +# CONFIG_GPTIMER_ISR_IRAM_SAFE is not set +# CONFIG_MCPWM_ISR_IRAM_SAFE is not set +# CONFIG_EVENT_LOOP_PROFILING is not set +CONFIG_POST_EVENTS_FROM_ISR=y +CONFIG_POST_EVENTS_FROM_IRAM_ISR=y +CONFIG_GDBSTUB_SUPPORT_TASKS=y +CONFIG_GDBSTUB_MAX_TASKS=32 +# CONFIG_OTA_ALLOW_HTTP is not set +CONFIG_ESP32S3_DEEP_SLEEP_WAKEUP_DELAY=2000 +CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 +CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC=y +# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS is not set +# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC is not set +# CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 is not set +CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES=1024 +CONFIG_PERIPH_CTRL_FUNC_IN_IRAM=y +CONFIG_BROWNOUT_DET=y +CONFIG_ESP32S3_BROWNOUT_DET=y +CONFIG_BROWNOUT_DET_LVL_SEL_7=y +CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_7=y +# CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set +# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_6 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set +# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_5 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_4 is not set +# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_4 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_3 is not set +# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_3 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_2 is not set +# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_2 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_1 is not set +# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_1 is not set +CONFIG_BROWNOUT_DET_LVL=7 +CONFIG_ESP32S3_BROWNOUT_DET_LVL=7 +CONFIG_ESP_SYSTEM_BROWNOUT_INTR=y +CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y +# CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set +# CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set +# CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set +# CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set +CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y +CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT=y +CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_SYSTIMER=y +CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1=y +# CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set +# CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC is not set +# CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT is not set +# CONFIG_ESP32S3_TIME_SYSCALL_USE_SYSTIMER is not set +# CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1 is not set +# CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set +# CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE is not set +CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set +CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP32_PHY_MAX_TX_POWER=20 +# CONFIG_REDUCE_PHY_TX_POWER is not set +# CONFIG_ESP32_REDUCE_PHY_TX_POWER is not set +CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU=y +CONFIG_PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP=y +CONFIG_ESP32S3_SPIRAM_SUPPORT=y +CONFIG_DEFAULT_PSRAM_CLK_IO=30 +CONFIG_DEFAULT_PSRAM_CS_IO=26 +CONFIG_CONSOLE_UART_DEFAULT=y +# CONFIG_CONSOLE_UART_CUSTOM is not set +# CONFIG_CONSOLE_UART_NONE is not set +# CONFIG_ESP_CONSOLE_UART_NONE is not set +CONFIG_CONSOLE_UART=y +CONFIG_CONSOLE_UART_NUM=0 +CONFIG_CONSOLE_UART_BAUDRATE=115200 +# CONFIG_ESP32S3_DEFAULT_CPU_FREQ_80 is not set +CONFIG_ESP32S3_DEFAULT_CPU_FREQ_160=y +# CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240 is not set +CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ=160 +CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=y +CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_VIA_TEE=y +CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=y +CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK=y +CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 +CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 +CONFIG_MAIN_TASK_STACK_SIZE=3584 +CONFIG_INT_WDT=y +CONFIG_INT_WDT_TIMEOUT_MS=300 +CONFIG_INT_WDT_CHECK_CPU1=y +CONFIG_TASK_WDT=y +CONFIG_ESP_TASK_WDT=y +# CONFIG_TASK_WDT_PANIC is not set +CONFIG_TASK_WDT_TIMEOUT_S=5 +CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y +CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y +# CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set +CONFIG_ESP32S3_DEBUG_OCDAWARE=y +CONFIG_IPC_TASK_STACK_SIZE=1280 +CONFIG_TIMER_TASK_STACK_SIZE=3584 +# CONFIG_ESP32_APPTRACE_ENABLE is not set +CONFIG_ESP32_WIFI_ENABLED=y +CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 +CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 +# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set +CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y +CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1 +CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32 +# CONFIG_ESP32_WIFI_CSI_ENABLED is not set +CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y +CONFIG_ESP32_WIFI_TX_BA_WIN=6 +CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y +CONFIG_ESP32_WIFI_RX_BA_WIN=6 +CONFIG_ESP32_WIFI_NVS_ENABLED=y +CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0=y +# CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1 is not set +CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 +CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32 +CONFIG_ESP32_WIFI_IRAM_OPT=y +CONFIG_ESP32_WIFI_RX_IRAM_OPT=y +CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y +CONFIG_ESP32_WIFI_ENABLE_WPA3_OWE_STA=y +CONFIG_WPA_MBEDTLS_CRYPTO=y +CONFIG_WPA_MBEDTLS_TLS_CLIENT=y +# CONFIG_WPA_WAPI_PSK is not set +# CONFIG_WPA_SUITE_B_192 is not set +# CONFIG_WPA_11KV_SUPPORT is not set +# CONFIG_WPA_MBO_SUPPORT is not set +# CONFIG_WPA_DPP_SUPPORT is not set +# CONFIG_WPA_11R_SUPPORT is not set +# CONFIG_WPA_WPS_SOFTAP_REGISTRAR is not set +# CONFIG_WPA_WPS_STRICT is not set +# CONFIG_WPA_DEBUG_PRINT is not set +# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set +# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set +CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y +CONFIG_TIMER_TASK_PRIORITY=1 +CONFIG_TIMER_TASK_STACK_DEPTH=2048 +CONFIG_TIMER_QUEUE_LENGTH=10 +# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set +CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY=y +# CONFIG_HAL_ASSERTION_SILIENT is not set +# CONFIG_L2_TO_L3_COPY is not set +CONFIG_ESP_GRATUITOUS_ARP=y +CONFIG_GARP_TMR_INTERVAL=60 +CONFIG_TCPIP_RECVMBOX_SIZE=32 +CONFIG_TCP_MAXRTX=12 +CONFIG_TCP_SYNMAXRTX=12 +CONFIG_TCP_MSS=1440 +CONFIG_TCP_MSL=60000 +CONFIG_TCP_SND_BUF_DEFAULT=5760 +CONFIG_TCP_WND_DEFAULT=5760 +CONFIG_TCP_RECVMBOX_SIZE=6 +CONFIG_TCP_QUEUE_OOSEQ=y +CONFIG_TCP_OVERSIZE_MSS=y +# CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set +# CONFIG_TCP_OVERSIZE_DISABLE is not set +CONFIG_UDP_RECVMBOX_SIZE=6 +CONFIG_TCPIP_TASK_STACK_SIZE=3072 +CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y +# CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set +# CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set +CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF +# CONFIG_PPP_SUPPORT is not set +CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 +CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 +CONFIG_ESP32_PTHREAD_STACK_MIN=768 +CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y +# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_0 is not set +# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_1 is not set +CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 +CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" +CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y +# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set +# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set +CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y +# CONFIG_SUPPORT_TERMIOS is not set +CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1 +# End of deprecated options diff --git a/velxio-deployer-firmware/sdkconfig.defaults b/velxio-deployer-firmware/sdkconfig.defaults new file mode 100644 index 0000000..83cace0 --- /dev/null +++ b/velxio-deployer-firmware/sdkconfig.defaults @@ -0,0 +1,50 @@ +# Velxio BLE Deployer - ESP32-S3 N16R8 +# ESP-IDF v6.0 +# Native USB OTG (GPIO19/20) = USB Host → Arduino +# Debug log via UART0 (USB-to-UART bridge devkit) + +# FreeRTOS +CONFIG_FREERTOS_HZ=100 + +# NimBLE +CONFIG_BT_ENABLED=y +CONFIG_BT_NIMBLE_ENABLED=y +CONFIG_BT_NIMBLE_ROLE_PERIPHERAL=y +CONFIG_BT_NIMBLE_SVC_GAP_DEVICE_NAME="Velxio-Deployer" +CONFIG_BT_NIMBLE_MAX_CONNECTIONS=1 +CONFIG_BT_NIMBLE_MAX_BONDS=1 +CONFIG_BT_NIMBLE_HS_STOP_TIMEOUT_MS=5000 +CONFIG_BT_NIMBLE_ATT_PREFERRED_MTU=255 + +# PSRAM (octal, N16R8) +CONFIG_SPIRAM=y +CONFIG_SPIRAM_MODE_OCT=y +CONFIG_SPIRAM_TYPE_AUTO=y +CONFIG_SPIRAM_USE_CAPS_ALLOC=y + +# Partition Table +CONFIG_PARTITION_TABLE_CUSTOM=y +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" +CONFIG_PARTITION_TABLE_FILENAME="partitions.csv" + +# Compiler Optimizations +CONFIG_COMPILER_OPTIMIZATION_PERF=y + +# Flash Size (16 MB untuk ESP32-S3 N16R8) +CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y + +# Logging +CONFIG_LOG_DEFAULT_LEVEL_INFO=y + +# Serial console via UART0 (bukan USB-JTAG, karena USB native dipakai Host) +CONFIG_ESP_CONSOLE_UART_DEFAULT=y + +# CherryUSB Host (native USB OTG S3) +CONFIG_CHERRYUSB=y +CONFIG_CHERRYUSB_HOST=y +# Serial drivers — enable all for max Arduino clone compatibility +CONFIG_CHERRYUSB_HOST_CDC_ACM=y +CONFIG_CHERRYUSB_HOST_CH34X=y +CONFIG_CHERRYUSB_HOST_FTDI=y +CONFIG_CHERRYUSB_HOST_CP210X=y +CONFIG_CHERRYUSB_HOST_PL2303=y