From f3f9c51d6530978861e42353556eb9942a6ad43d Mon Sep 17 00:00:00 2001 From: a2nr Date: Sun, 23 Jun 2024 12:18:22 +0700 Subject: [PATCH] Update probe --- Electronics/.gitignore | 29 + Electronics/README.md | 5 + Electronics/probe/probe.kicad_pcb | 2976 +++++ Electronics/probe/probe.kicad_pro | 515 + Electronics/probe/probe.kicad_sch | 1502 +++ Electronics/probe/probe.png | Bin 0 -> 546189 bytes Electronics/probe/probe.step | 17884 ++++++++++++++++++++++++++++ 7 files changed, 22911 insertions(+) create mode 100644 Electronics/.gitignore create mode 100644 Electronics/probe/probe.kicad_pcb create mode 100644 Electronics/probe/probe.kicad_pro create mode 100644 Electronics/probe/probe.kicad_sch create mode 100644 Electronics/probe/probe.png create mode 100644 Electronics/probe/probe.step diff --git a/Electronics/.gitignore b/Electronics/.gitignore new file mode 100644 index 0000000..1bd298a --- /dev/null +++ b/Electronics/.gitignore @@ -0,0 +1,29 @@ +# For PCBs designed using KiCad: https://www.kicad.org/ +# Format documentation: https://kicad.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*.kicad_sch-bak +*-backups +*.kicad_prl +*.sch-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv \ No newline at end of file diff --git a/Electronics/README.md b/Electronics/README.md index e69de29..cf8761d 100644 --- a/Electronics/README.md +++ b/Electronics/README.md @@ -0,0 +1,5 @@ +# Electronics + +## Probe + +![probe](https://git.manakin-gentoo.ts.net/a2nr/HeartBeatRate/raw/branch/electronics/Electronics/probe/probe.png) diff --git a/Electronics/probe/probe.kicad_pcb b/Electronics/probe/probe.kicad_pcb new file mode 100644 index 0000000..374921b --- /dev/null +++ b/Electronics/probe/probe.kicad_pcb @@ -0,0 +1,2976 @@ +(kicad_pcb (version 20221018) (generator pcbnew) + + (general + (thickness 1.6) + ) + + (paper "A2") + (layers + (0 "F.Cu" signal) + (31 "B.Cu" signal) + (32 "B.Adhes" user "B.Adhesive") + (33 "F.Adhes" user "F.Adhesive") + (34 "B.Paste" user) + (35 "F.Paste" user) + (36 "B.SilkS" user "B.Silkscreen") + (37 "F.SilkS" user "F.Silkscreen") + (38 "B.Mask" user) + (39 "F.Mask" user) + (40 "Dwgs.User" user "User.Drawings") + (41 "Cmts.User" user "User.Comments") + (42 "Eco1.User" user "User.Eco1") + (43 "Eco2.User" user "User.Eco2") + (44 "Edge.Cuts" user) + (45 "Margin" user) + (46 "B.CrtYd" user "B.Courtyard") + (47 "F.CrtYd" user "F.Courtyard") + (48 "B.Fab" user) + (49 "F.Fab" user) + (50 "User.1" user) + (51 "User.2" user) + (52 "User.3" user) + (53 "User.4" user) + (54 "User.5" user) + (55 "User.6" user) + (56 "User.7" user) + (57 "User.8" user) + (58 "User.9" user) + ) + + (setup + (stackup + (layer "F.SilkS" (type "Top Silk Screen")) + (layer "F.Paste" (type "Top Solder Paste")) + (layer "F.Mask" (type "Top Solder Mask") (thickness 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"spice_model_current_sheet_as_root": true, + "spice_save_all_currents": false, + "spice_save_all_voltages": false, + "subpart_first_id": 65, + "subpart_id_separator": 0 + }, + "sheets": [ + [ + "7a88fdb4-8744-49a5-b9ea-7752d6077bb6", + "" + ] + ], + "text_variables": {} +} diff --git a/Electronics/probe/probe.kicad_sch b/Electronics/probe/probe.kicad_sch new file mode 100644 index 0000000..c81d9d5 --- /dev/null +++ b/Electronics/probe/probe.kicad_sch @@ -0,0 +1,1502 @@ +(kicad_sch (version 20230121) (generator eeschema) + + (uuid 7a88fdb4-8744-49a5-b9ea-7752d6077bb6) + + (paper "A4") + + (lib_symbols + (symbol "Connector:Conn_Coaxial" (pin_names (offset 1.016) hide) (in_bom yes) (on_board yes) + (property "Reference" "J" (at 0.254 3.048 0) + (effects (font (size 1.27 1.27))) + ) + (property "Value" "Conn_Coaxial" (at 2.921 0 90) + (effects (font (size 1.27 1.27))) + ) + (property "Footprint" "" (at 0 0 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "Datasheet" " ~" (at 0 0 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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