diff --git a/Electronics/probe/build/probe-B_Cu.gbr b/Electronics/probe/build/probe-B_Cu.gbr
new file mode 100644
index 0000000..31a76ce
--- /dev/null
+++ b/Electronics/probe/build/probe-B_Cu.gbr
@@ -0,0 +1,4902 @@
+%TF.GenerationSoftware,KiCad,Pcbnew,8.0.3*%
+%TF.CreationDate,2024-07-10T09:14:50+07:00*%
+%TF.ProjectId,probe,70726f62-652e-46b6-9963-61645f706362,rev?*%
+%TF.SameCoordinates,Original*%
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+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 8.0.3) date 2024-07-10 09:14:50*
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+G04 APERTURE END LIST*
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diff --git a/Electronics/probe/build/probe-B_Silkscreen.gbr b/Electronics/probe/build/probe-B_Silkscreen.gbr
new file mode 100644
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diff --git a/Electronics/probe/build/probe-Edge_Cuts.gbr b/Electronics/probe/build/probe-Edge_Cuts.gbr
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--- /dev/null
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diff --git a/Electronics/probe/build/probe-F_Cu.gbr b/Electronics/probe/build/probe-F_Cu.gbr
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diff --git a/Electronics/probe/build/probe-F_Mask.gbr b/Electronics/probe/build/probe-F_Mask.gbr
new file mode 100644
index 0000000..dd32e53
--- /dev/null
+++ b/Electronics/probe/build/probe-F_Mask.gbr
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diff --git a/Electronics/probe/build/probe-F_Paste.gbr b/Electronics/probe/build/probe-F_Paste.gbr
new file mode 100644
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diff --git a/Electronics/probe/build/probe-PTH-drl_map.gbr b/Electronics/probe/build/probe-PTH-drl_map.gbr
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diff --git a/Electronics/probe/build/probe-PTH.drl b/Electronics/probe/build/probe-PTH.drl
new file mode 100644
index 0000000..b5a4a94
--- /dev/null
+++ b/Electronics/probe/build/probe-PTH.drl
@@ -0,0 +1,59 @@
+M48
+; DRILL file {KiCad 8.0.3} date 2024-07-10T09:14:42+0700
+; FORMAT={-:-/ absolute / inch / decimal}
+; #@! TF.CreationDate,2024-07-10T09:14:42+07:00
+; #@! TF.GenerationSoftware,Kicad,Pcbnew,8.0.3
+; #@! TF.FileFunction,Plated,1,2,PTH
+FMAT,2
+INCH
+; #@! TA.AperFunction,Plated,PTH,ComponentDrill
+T1C0.0181
+; #@! TA.AperFunction,Plated,PTH,ViaDrill
+T2C0.0787
+%
+G90
+G05
+T1
+X6.0114Y-5.5854
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+M30
diff --git a/Electronics/probe/build/probe-job.gbrjob b/Electronics/probe/build/probe-job.gbrjob
new file mode 100644
index 0000000..df00c18
--- /dev/null
+++ b/Electronics/probe/build/probe-job.gbrjob
@@ -0,0 +1,127 @@
+{
+  "Header": {
+    "GenerationSoftware": {
+      "Vendor": "KiCad",
+      "Application": "Pcbnew",
+      "Version": "8.0.3"
+    },
+    "CreationDate": "2024-07-10T09:14:50+07:00"
+  },
+  "GeneralSpecs": {
+    "ProjectId": {
+      "Name": "probe",
+      "GUID": "70726f62-652e-46b6-9963-61645f706362",
+      "Revision": "rev?"
+    },
+    "Size": {
+      "X": 236.05,
+      "Y": 112.8
+    },
+    "LayerNumber": 2,
+    "BoardThickness": 1.6,
+    "Finish": "None"
+  },
+  "DesignRules": [
+    {
+      "Layers": "Outer",
+      "PadToPad": 0.2,
+      "PadToTrack": 0.2,
+      "TrackToTrack": 0.2,
+      "MinLineWidth": 2.0,
+      "TrackToRegion": 0.5,
+      "RegionToRegion": 0.5
+    }
+  ],
+  "FilesAttributes": [
+    {
+      "Path": "probe-F_Cu.gbr",
+      "FileFunction": "Copper,L1,Top",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "probe-B_Cu.gbr",
+      "FileFunction": "Copper,L2,Bot",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "probe-F_Paste.gbr",
+      "FileFunction": "SolderPaste,Top",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "probe-B_Paste.gbr",
+      "FileFunction": "SolderPaste,Bot",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "probe-F_Silkscreen.gbr",
+      "FileFunction": "Legend,Top",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "probe-B_Silkscreen.gbr",
+      "FileFunction": "Legend,Bot",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "probe-F_Mask.gbr",
+      "FileFunction": "SolderMask,Top",
+      "FilePolarity": "Negative"
+    },
+    {
+      "Path": "probe-B_Mask.gbr",
+      "FileFunction": "SolderMask,Bot",
+      "FilePolarity": "Negative"
+    },
+    {
+      "Path": "probe-Edge_Cuts.gbr",
+      "FileFunction": "Profile",
+      "FilePolarity": "Positive"
+    }
+  ],
+  "MaterialStackup": [
+    {
+      "Type": "Legend",
+      "Name": "Top Silk Screen"
+    },
+    {
+      "Type": "SolderPaste",
+      "Name": "Top Solder Paste"
+    },
+    {
+      "Type": "SolderMask",
+      "Thickness": 0.01,
+      "Name": "Top Solder Mask"
+    },
+    {
+      "Type": "Copper",
+      "Thickness": 0.035,
+      "Name": "F.Cu"
+    },
+    {
+      "Type": "Dielectric",
+      "Thickness": 1.51,
+      "Material": "FR4",
+      "Name": "F.Cu/B.Cu",
+      "Notes": "Type: dielectric layer 1 (from F.Cu to B.Cu)"
+    },
+    {
+      "Type": "Copper",
+      "Thickness": 0.035,
+      "Name": "B.Cu"
+    },
+    {
+      "Type": "SolderMask",
+      "Thickness": 0.01,
+      "Name": "Bottom Solder Mask"
+    },
+    {
+      "Type": "SolderPaste",
+      "Name": "Bottom Solder Paste"
+    },
+    {
+      "Type": "Legend",
+      "Name": "Bottom Silk Screen"
+    }
+  ]
+}
diff --git a/Electronics/probe/probe.kicad_pcb b/Electronics/probe/probe.kicad_pcb
index e73579f..bcf809d 100644
--- a/Electronics/probe/probe.kicad_pcb
+++ b/Electronics/probe/probe.kicad_pcb
@@ -1,2987 +1,3 @@
-<<<<<<< HEAD
-(kicad_pcb (version 20221018) (generator pcbnew)
-
-  (general
-    (thickness 1.6)
-  )
-
-  (paper "A2")
-  (layers
-    (0 "F.Cu" signal)
-    (31 "B.Cu" signal)
-    (32 "B.Adhes" user "B.Adhesive")
-    (33 "F.Adhes" user "F.Adhesive")
-    (34 "B.Paste" user)
-    (35 "F.Paste" user)
-    (36 "B.SilkS" user "B.Silkscreen")
-    (37 "F.SilkS" user "F.Silkscreen")
-    (38 "B.Mask" user)
-    (39 "F.Mask" user)
-    (40 "Dwgs.User" user "User.Drawings")
-    (41 "Cmts.User" user "User.Comments")
-    (42 "Eco1.User" user "User.Eco1")
-    (43 "Eco2.User" user "User.Eco2")
-    (44 "Edge.Cuts" user)
-    (45 "Margin" user)
-    (46 "B.CrtYd" user "B.Courtyard")
-    (47 "F.CrtYd" user "F.Courtyard")
-    (48 "B.Fab" user)
-    (49 "F.Fab" user)
-    (50 "User.1" user)
-    (51 "User.2" user)
-    (52 "User.3" user)
-    (53 "User.4" user)
-    (54 "User.5" user)
-    (55 "User.6" user)
-    (56 "User.7" user)
-    (57 "User.8" user)
-    (58 "User.9" user)
-  )
-
-  (setup
-    (stackup
-      (layer "F.SilkS" (type "Top Silk Screen"))
-      (layer "F.Paste" (type "Top Solder Paste"))
-      (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))
-      (layer "F.Cu" (type "copper") (thickness 0.035))
-      (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
-      (layer "B.Cu" (type "copper") (thickness 0.035))
-      (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01))
-      (layer "B.Paste" (type "Bottom Solder Paste"))
-      (layer "B.SilkS" (type "Bottom Silk Screen"))
-      (copper_finish "None")
-      (dielectric_constraints no)
-    )
-    (pad_to_mask_clearance 0)
-    (pcbplotparams
-      (layerselection 0x00010fc_ffffffff)
-      (plot_on_all_layers_selection 0x0000000_00000000)
-      (disableapertmacros false)
-      (usegerberextensions false)
-      (usegerberattributes true)
-      (usegerberadvancedattributes true)
-      (creategerberjobfile true)
-      (dashed_line_dash_ratio 12.000000)
-      (dashed_line_gap_ratio 3.000000)
-      (svgprecision 4)
-      (plotframeref false)
-      (viasonmask false)
-      (mode 1)
-      (useauxorigin false)
-      (hpglpennumber 1)
-      (hpglpenspeed 20)
-      (hpglpendiameter 15.000000)
-      (dxfpolygonmode true)
-      (dxfimperialunits true)
-      (dxfusepcbnewfont true)
-      (psnegative false)
-      (psa4output false)
-      (plotreference true)
-      (plotvalue true)
-      (plotinvisibletext false)
-      (sketchpadsonfab false)
-      (subtractmaskfromsilk false)
-      (outputformat 1)
-      (mirror false)
-      (drillshape 0)
-      (scaleselection 1)
-      (outputdirectory "build/")
-    )
-  )
-
-  (net 0 "")
-  (net 1 "/Probe")
-  (net 2 "GND")
-
-  (footprint "Connector_Coaxial:SMA_Molex_73251-1153_EdgeMount_Horizontal" (layer "F.Cu")
-    (tstamp 04a63c20-941e-456b-87b6-1581e4a1a522)
-    (at 150.97 212.4)
-    (descr "Molex SMA RF Connectors, Edge Mount, (http://www.molex.com/pdm_docs/sd/732511150_sd.pdf)")
-    (tags "sma edge")
-    (property "Sheetfile" "probe.kicad_sch")
-    (property "Sheetname" "")
-    (property "ki_description" "coaxial connector (BNC, SMA, SMB, SMC, Cinch/RCA, LEMO, ...)")
-    (property "ki_keywords" "BNC SMA SMB SMC LEMO coaxial connector CINCH RCA MCX MMCX U.FL UMRF")
-    (path "/ea0e86b2-3241-4990-b364-4dca4e6c483c")
-    (attr smd)
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 (kicad_pcb
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 			(outputformat 1)
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+			(drillshape 0)
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+			(outputdirectory "build/")
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@@ -16803,5 +13819,4 @@
 			"e323af2f-8e97-494e-b308-be01a8f74549"
 		)
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->>>>>>> e0.3
 )
diff --git a/Electronics/probe/probe.kicad_pro b/Electronics/probe/probe.kicad_pro
index 52aa7cc..ea68590 100644
--- a/Electronics/probe/probe.kicad_pro
+++ b/Electronics/probe/probe.kicad_pro
@@ -38,8 +38,8 @@
         "other_text_upright": false,
         "pads": {
           "drill": 0.0,
-          "height": 4.0,
-          "width": 4.0
+          "height": 2.29,
+          "width": 5.08
         },
         "silk_line_width": 0.1,
         "silk_text_italic": false,
@@ -506,14 +506,11 @@
       "gencad": "",
       "idf": "",
       "netlist": "",
-      "plot": "",
+      "plot": "build/",
       "pos_files": "",
       "specctra_dsn": "",
       "step": "probe.step",
-<<<<<<< HEAD
-=======
       "svg": "",
->>>>>>> e0.3
       "vrml": "probe.wrl"
     },
     "page_layout_descr_file": ""
diff --git a/Electronics/probe/probe.png b/Electronics/probe/probe.png
index 9a61190..e6e75a4 100644
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